diff options
| author | Wang Qing Pei <wangqingpei@gmail.com> | 2010-08-17 15:05:05 +0000 |
|---|---|---|
| committer | Stefan Reinauer <stepan@openbios.org> | 2010-08-17 15:05:05 +0000 |
| commit | 42e7c32cc5253c2c8c6149a57a4667ec5ebf8262 (patch) | |
| tree | 319f15db846afc331f99fd74afb2cfef631c683d /src/superio/fintek/f71863fg/f71863fg.h | |
| parent | acc374964421cad55d47770b5f27c5bce05228f3 (diff) | |
Support for Fintek F71863FG. This might need some work on the copyright
notices. Getting it into the tree so people can get to it.
Signed-off-by: Wang Qing Pei <wangqingpei@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5717 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/superio/fintek/f71863fg/f71863fg.h')
| -rw-r--r-- | src/superio/fintek/f71863fg/f71863fg.h | 29 |
1 files changed, 29 insertions, 0 deletions
diff --git a/src/superio/fintek/f71863fg/f71863fg.h b/src/superio/fintek/f71863fg/f71863fg.h new file mode 100644 index 0000000000..bd67b24669 --- /dev/null +++ b/src/superio/fintek/f71863fg/f71863fg.h @@ -0,0 +1,29 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2010 Wang Qing Pei <wangqingpei@gmail.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* Logical Device Numbers (LDN). */ +#define F71863FG_FDC 0x00 /* Floppy */ +#define F71863FG_SP1 0x01 /* UART1 */ +#define F71863FG_SP2 0x02 /* UART2 */ +#define F71863FG_PP 0x03 /* Parallel Port */ +#define F71863FG_HWM 0x04 /* Hardware Monitor */ +#define F71863FG_KBC 0x05 /* KBC devices */ +#define F71863FG_GPIO 0x06 /* General Purpose I/O (GPIO) */ +#define F71863FG_PME 0x0a /* Power Management Events (PME) */ |