diff options
| author | Nick Vaccaro <nvaccaro@chromium.org> | 2017-12-28 20:22:50 -0800 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2018-01-05 21:32:36 +0000 |
| commit | 7f61fb99d5b8db186a2893c2bd6807f6316f8a81 (patch) | |
| tree | 4adf11859cb03ba1cdd03cee5bec8e0757d7d955 /src/superio/fintek/f71805f | |
| parent | 2d35ffbf944236b7dbfdc413fec6ba5abe2ab781 (diff) | |
mainboard/google/zoombini: Fix some devicetree pci settings
- Enable I2C #2, #3, and #5
- Enable UART #2
- Enable GSPI #0 and #1
- Disable SATA
- Set pci 1f.0 to chromeec
BUG=b:64395641
BRANCH=None
TEST=Verify "./util/abuild/abuild -p none -t google/zoombini -x -a"
compiles successfully.
Change-Id: Ie29652beff36f19a59746a1ad5f8e7f995ef1281
Signed-off-by: Nick Vaccaro <nvaccaro@chromium.org>
Reviewed-on: https://review.coreboot.org/23034
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/superio/fintek/f71805f')
0 files changed, 0 insertions, 0 deletions