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author | Shankar, Vaibhav <vaibhav.shankar@intel.com> | 2016-08-02 10:04:17 -0700 |
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committer | Aaron Durbin <adurbin@chromium.org> | 2016-08-04 16:12:54 +0200 |
commit | fec95be8b6e222ce73890577c0ecd32793d0df43 (patch) | |
tree | bc99f62bf9e702431fb7df095ab9ce921453df37 /src/superio/common | |
parent | d03596f4ca9ff27f0483381eaca1a54d01a14165 (diff) |
google/reef: Add GPIO changes to assert SLP_S0/Reset signal
PMIC/PMU: Set the iosstates for PMIC to assert the reset
signal, PMU to assert SLP_S0 signal.
Change-Id: If5a6a1cb8f065a8c3a6a19d9441a21d60b39e579
Signed-off-by: Venkateswarlu Vinjamuri <venkateswarlu.v.vinjamuri@intel.com>
Signed-off-by: Shankar, Vaibhav <vaibhav.shankar@intel.com>
Reviewed-on: https://review.coreboot.org/16031
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/superio/common')
0 files changed, 0 insertions, 0 deletions