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| author | Aamir Bohra <aamir.bohra@intel.com> | 2017-04-06 11:10:35 +0530 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-04-10 20:46:17 +0200 |
| commit | 237a93c43e9d269926f34839ee88f00833701ce6 (patch) | |
| tree | 47fc3781b00af8ae979942e2c326f77045214366 /src/superio/common/conf_mode.c | |
| parent | 8bf69d307892c65cdc604136146c1a6702956e20 (diff) | |
soc/intel/common/block: Add LPSS function library
LPSS function library implements common register
programming under lpss.
Change-Id: I881da01be8191270d9505737f68a6d2d8cd8cc69
Signed-off-by: Aamir Bohra <aamir.bohra@intel.com>
Reviewed-on: https://review.coreboot.org/19001
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/superio/common/conf_mode.c')
0 files changed, 0 insertions, 0 deletions