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authorFurquan Shaikh <furquan@google.com>2020-05-29 09:03:30 -0700
committerPatrick Georgi <pgeorgi@google.com>2020-06-06 09:28:31 +0000
commit17dfa7e25c794c99e9cd18372103860dbd0828b8 (patch)
treef525a2608ebd79473a5e67da725799c4a1bf797b /src/superio/aspeed
parent5ce3bca1e7e769df7941d818dcc65484ad1b2b53 (diff)
soc/intel/jasperlake: Generate LP4x SPD files using gen_spd.go
This change uses gen_spd.go and global_lp4x_mem_parts.json.txt to generate SPD files for currently known LP4x memory parts that can be used with JSL-based mainboards. Following files are added: 1. spd-*.hex: SPD files auto-generated by gen_spd.go 2. spd_manifest.generated.txt: Manifest file auto-generated by gen_spd.go Mainboards can use the SPD files from SoC directly when creating SPD binary to add to CBFS. Change-Id: Ic52506b809c66b9f7cf25a100a959d85c67addf2 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41876 Reviewed-by: Nick Vaccaro <nvaccaro@google.com> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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