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authorAamir Bohra <aamir.bohra@intel.com>2020-05-26 14:52:31 +0530
committerPatrick Georgi <pgeorgi@google.com>2020-05-28 09:49:14 +0000
commit316c180c413d08713795c7ae943b84d799deedfd (patch)
treecdf620516c89a06e81c85f551c4f97c4fc19af50 /src/superio/aspeed/ast2400
parent1b35ec97cc54337680e239c7ad10fa1acc716a2f (diff)
soc/intel/jasperlake: Correct GPIO community PID configuration
Current implementation returns the incorrect GPIO community PID. The GPIO community index 3 should return PID for COMM_4 and index 4 should return PID for COMM_5. TEST=Verify GPIO PM bits are correctly set through MS0x ACPI method. Signed-off-by: Aamir Bohra <aamir.bohra@intel.com> Change-Id: I3da4945e93605a297baff076295433164fdf613d Reviewed-on: https://review.coreboot.org/c/coreboot/+/41721 Reviewed-by: Maulik V Vaghela <maulik.v.vaghela@intel.com> Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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