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authorFelix Held <felix-coreboot@felixheld.de>2021-01-22 23:50:54 +0100
committerFelix Held <felix-coreboot@felixheld.de>2021-01-24 18:16:09 +0000
commitf09221c033a27d87f39ab074ee53a109a861f096 (patch)
tree8169addbced165c5e79147b1a1fa22f7a226e602 /src/superio/acpi/pnp_kbc.asl
parent57419de1879ca5d40669fb2690428bc0e0addb31 (diff)
soc/amd/cezanne/Kconfig: select X86_AMD_FIXED_MTRRS
This option will make the ramstage MTRR core set the additional bits in the fixed MTRRs that need to be set on AMD CPUs to enable caching. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I94bca61acfc6e38a6d808eb5020537b4e8596178 Reviewed-on: https://review.coreboot.org/c/coreboot/+/49851 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-by: Raul Rangel <rrangel@chromium.org>
Diffstat (limited to 'src/superio/acpi/pnp_kbc.asl')
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