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authorAngel Pons <th3fanbus@gmail.com>2020-03-08 20:10:48 +0100
committerPatrick Georgi <pgeorgi@google.com>2020-03-09 21:23:27 +0000
commitacabbce229e05f3a649bd3f97a4254acc7440966 (patch)
treee57b0c787e6602611a1b6013c8d8296b23b3b3ec /src/superio/Makefile.inc
parent915d1eaeae417b5e0114da33efe87272e3adb6e5 (diff)
mb/asus/p5qpl-am: Do not set BSEL GPIOs in devicetree
This mainboard has the FSB BSEL straps wired to SuperIO GPIOs. They are set up in romstage, so it makes no sense to rewrite their values in ramstage. Tested, my Asus P5QPL-AM still boots. Change-Id: Ic47f96d12420ebcc70ab5cea940c4c09620c03ca Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39385 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/superio/Makefile.inc')
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