diff options
author | Eric Biederman <ebiederm@xmission.com> | 2003-06-18 11:03:18 +0000 |
---|---|---|
committer | Eric Biederman <ebiederm@xmission.com> | 2003-06-18 11:03:18 +0000 |
commit | d3283ec05f51056faa18610e952ccc81cb738313 (patch) | |
tree | 71279430d699e679cda9371fa7cf26005cc8b927 /src/southbridge | |
parent | 99acb49cf71ee7038216391ae2b0d09675ab6ce5 (diff) |
- A new test case for romcc
- Minor romcc fixes
- In smbus_wail_until_done a romcc glitch with || in romcc where it likes
to run out of registers. Use | to be explicit that I don't need the short
circuiting behavior.
- Remove unused #defines from coherent_ht.c
- Update the test in auto.c to 512M
- Add definition of log2 to romcc_io.h
- Implement SPD memory sizing in raminit.c
- Reduce the number of memory devices back 2 to for the SOLO board.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@883 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge')
-rw-r--r-- | src/southbridge/amd/amd8111/amd8111_early_smbus.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/southbridge/amd/amd8111/amd8111_early_smbus.c b/src/southbridge/amd/amd8111/amd8111_early_smbus.c index 6b6d9ad144..33f558896e 100644 --- a/src/southbridge/amd/amd8111/amd8111_early_smbus.c +++ b/src/southbridge/amd/amd8111/amd8111_early_smbus.c @@ -53,7 +53,7 @@ static int smbus_wait_until_done(void) smbus_delay(); val = inw(SMBUS_IO_BASE + SMBGSTATUS); - if (((val & 0x8) == 0) || ((val & 0x437) != 0)) { + if (((val & 0x8) == 0) | ((val & 0x437) != 0)) { break; } } while(--loops); |