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author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2014-02-04 20:28:23 +0200 |
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committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2014-02-06 11:17:05 +0100 |
commit | d0281f15eb352ca8efca6f32c727a1f73f307f11 (patch) | |
tree | 0affc763d5800352b2df4754cc4e0d306c7aa3af /src/southbridge | |
parent | 2113099e49dff8c985763521b7ad9f1d1c6bb89c (diff) |
uart8250: Drop unused declarations
Change-Id: Ie915ef9dbc45604bd5ca1b610acb12af634fdebe
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/5138
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Diffstat (limited to 'src/southbridge')
-rw-r--r-- | src/southbridge/amd/cimx/sb700/bootblock.c | 32 | ||||
-rw-r--r-- | src/southbridge/amd/cimx/sb900/bootblock.c | 32 |
2 files changed, 0 insertions, 64 deletions
diff --git a/src/southbridge/amd/cimx/sb700/bootblock.c b/src/southbridge/amd/cimx/sb700/bootblock.c index fc7f3c52cc..1027659d5c 100644 --- a/src/southbridge/amd/cimx/sb700/bootblock.c +++ b/src/southbridge/amd/cimx/sb700/bootblock.c @@ -20,38 +20,6 @@ #include <arch/io.h> -#if CONFIG_CONSOLE_POST - -/* Data */ -#define UART_RBR 0x00 -#define UART_TBR 0x00 - -/* Control */ -#define UART_IER 0x01 -#define UART_IIR 0x02 -#define UART_FCR 0x02 -#define UART_LCR 0x03 -#define UART_MCR 0x04 -#define UART_DLL 0x00 -#define UART_DLM 0x01 - -/* Status */ -#define UART_LSR 0x05 -#define UART_MSR 0x06 -#define UART_SCR 0x07 - -#ifndef CONFIG_TTYS0_DIV -#if ((115200%CONFIG_TTYS0_BAUD) != 0) -#error Bad ttys0 baud rate -#endif -#define CONFIG_TTYS0_DIV (115200/CONFIG_TTYS0_BAUD) -#endif // CONFIG_TTYS0_DIV - -#define UART_LCS CONFIG_TTYS0_LCS - -#endif // CONFIG_CONSOLE_POST == 1 - - static void sb700_enable_rom(void) { u32 word; diff --git a/src/southbridge/amd/cimx/sb900/bootblock.c b/src/southbridge/amd/cimx/sb900/bootblock.c index 106f664738..9108a8bb75 100644 --- a/src/southbridge/amd/cimx/sb900/bootblock.c +++ b/src/southbridge/amd/cimx/sb900/bootblock.c @@ -19,38 +19,6 @@ #include <arch/io.h> -#if CONFIG_CONSOLE_POST - -/* Data */ -#define UART_RBR 0x00 -#define UART_TBR 0x00 - -/* Control */ -#define UART_IER 0x01 -#define UART_IIR 0x02 -#define UART_FCR 0x02 -#define UART_LCR 0x03 -#define UART_MCR 0x04 -#define UART_DLL 0x00 -#define UART_DLM 0x01 - -/* Status */ -#define UART_LSR 0x05 -#define UART_MSR 0x06 -#define UART_SCR 0x07 - -#ifndef CONFIG_TTYS0_DIV -#if ((115200%CONFIG_TTYS0_BAUD) != 0) -#error Bad ttys0 baud rate -#endif -#define CONFIG_TTYS0_DIV (115200/CONFIG_TTYS0_BAUD) -#endif // CONFIG_TTYS0_DIV - -#define UART_LCS CONFIG_TTYS0_LCS - -#endif // CONFIG_CONSOLE_POST == 1 - - static void sb900_enable_rom(void) { u32 word; |