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authorNicholas Sudsgaard <devel+coreboot@nsudsgaard.com>2024-01-30 09:53:46 +0900
committerFelix Singer <service+coreboot-gerrit@felixsinger.de>2024-01-31 09:51:58 +0000
commitbfb11bec3b3fec638adf864a9b9b2cff6671fed8 (patch)
tree0247c385cfbd79aa8496b1ddc3c3afcce1465616 /src/southbridge
parentf4c496d3e3e779b3d870d13e1e359a3b5f7087cb (diff)
include/device/device.h: Remove CHIP_NAME() macro
Macros can be confusing on their own; hiding commas make things worse. This can sometimes be downright misleading. A "good" example would be the code in soc/intel/xeon_sp/spr/chip.c: CHIP_NAME("Intel SapphireRapids-SP").enable_dev = chip_enable_dev, This appears as CHIP_NAME() being some struct when in fact these are defining 2 separate members of the same struct. It was decided to remove this macro altogether, as it does not do anything special and incurs a maintenance burden. Change-Id: Iaed6dfb144bddcf5c43634b0c955c19afce388f0 Signed-off-by: Nicholas Sudsgaard <devel+coreboot@nsudsgaard.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/80239 Reviewed-by: Yidi Lin <yidilin@google.com> Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de> Reviewed-by: Jakub Czapiga <czapiga@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Diffstat (limited to 'src/southbridge')
-rw-r--r--src/southbridge/amd/pi/hudson/hudson.c2
-rw-r--r--src/southbridge/intel/bd82x6x/pch.c2
-rw-r--r--src/southbridge/intel/i82371eb/i82371eb.c2
-rw-r--r--src/southbridge/intel/i82801dx/i82801dx.c4
-rw-r--r--src/southbridge/intel/i82801gx/i82801gx.c2
-rw-r--r--src/southbridge/intel/i82801ix/i82801ix.c2
-rw-r--r--src/southbridge/intel/i82801jx/i82801jx.c2
-rw-r--r--src/southbridge/intel/i82870/pcibridge.c2
-rw-r--r--src/southbridge/intel/ibexpeak/pch.c2
-rw-r--r--src/southbridge/intel/lynxpoint/pch.c2
-rw-r--r--src/southbridge/ricoh/rl5c476/rl5c476.c2
-rw-r--r--src/southbridge/ti/pci1x2x/pci1x2x.c2
-rw-r--r--src/southbridge/ti/pci7420/cardbus.c2
13 files changed, 14 insertions, 14 deletions
diff --git a/src/southbridge/amd/pi/hudson/hudson.c b/src/southbridge/amd/pi/hudson/hudson.c
index 59e293f70f..26fb258879 100644
--- a/src/southbridge/amd/pi/hudson/hudson.c
+++ b/src/southbridge/amd/pi/hudson/hudson.c
@@ -92,7 +92,7 @@ static void hudson_final(void *chip_info)
}
struct chip_operations southbridge_amd_pi_hudson_ops = {
- CHIP_NAME("ATI HUDSON")
+ .name = "ATI HUDSON",
.enable_dev = hudson_enable,
.init = hudson_init,
.final = hudson_final
diff --git a/src/southbridge/intel/bd82x6x/pch.c b/src/southbridge/intel/bd82x6x/pch.c
index 32ed5cd4a9..1a9c2aee19 100644
--- a/src/southbridge/intel/bd82x6x/pch.c
+++ b/src/southbridge/intel/bd82x6x/pch.c
@@ -358,6 +358,6 @@ void pch_enable(struct device *dev)
}
struct chip_operations southbridge_intel_bd82x6x_ops = {
- CHIP_NAME("Intel Series 6/7 (Cougar Point/Panther Point) Southbridge")
+ .name = "Intel Series 6/7 (Cougar Point/Panther Point) Southbridge",
.enable_dev = pch_enable,
};
diff --git a/src/southbridge/intel/i82371eb/i82371eb.c b/src/southbridge/intel/i82371eb/i82371eb.c
index ce07152ad0..7c96fc375a 100644
--- a/src/southbridge/intel/i82371eb/i82371eb.c
+++ b/src/southbridge/intel/i82371eb/i82371eb.c
@@ -35,5 +35,5 @@
#include <device/device.h>
const struct chip_operations southbridge_intel_i82371eb_ops = {
- CHIP_NAME("Intel 82371FB/SB/MX/AB/EB/MB Southbridge")
+ .name = "Intel 82371FB/SB/MX/AB/EB/MB Southbridge",
};
diff --git a/src/southbridge/intel/i82801dx/i82801dx.c b/src/southbridge/intel/i82801dx/i82801dx.c
index ea906561a6..7a70902794 100644
--- a/src/southbridge/intel/i82801dx/i82801dx.c
+++ b/src/southbridge/intel/i82801dx/i82801dx.c
@@ -64,6 +64,6 @@ void i82801dx_enable(struct device *dev)
}
struct chip_operations southbridge_intel_i82801dx_ops = {
- CHIP_NAME("Intel ICH4/ICH4-M (82801Dx) Series Southbridge")
- .enable_dev = i82801dx_enable,
+ .name = "Intel ICH4/ICH4-M (82801Dx) Series Southbridge",
+ .enable_dev = i82801dx_enable,
};
diff --git a/src/southbridge/intel/i82801gx/i82801gx.c b/src/southbridge/intel/i82801gx/i82801gx.c
index 4783099570..86db048cd6 100644
--- a/src/southbridge/intel/i82801gx/i82801gx.c
+++ b/src/southbridge/intel/i82801gx/i82801gx.c
@@ -83,7 +83,7 @@ static void i82801gx_init(void *chip_info)
}
struct chip_operations southbridge_intel_i82801gx_ops = {
- CHIP_NAME("Intel ICH7/ICH7-M (82801Gx) Series Southbridge")
+ .name = "Intel ICH7/ICH7-M (82801Gx) Series Southbridge",
.enable_dev = i82801gx_enable,
.init = i82801gx_init,
};
diff --git a/src/southbridge/intel/i82801ix/i82801ix.c b/src/southbridge/intel/i82801ix/i82801ix.c
index 846c9d8f57..3d565944ef 100644
--- a/src/southbridge/intel/i82801ix/i82801ix.c
+++ b/src/southbridge/intel/i82801ix/i82801ix.c
@@ -203,7 +203,7 @@ static void i82801ix_init(void *chip_info)
}
struct chip_operations southbridge_intel_i82801ix_ops = {
- CHIP_NAME("Intel ICH9/ICH9-M (82801Ix) Series Southbridge")
+ .name = "Intel ICH9/ICH9-M (82801Ix) Series Southbridge",
.enable_dev = i82801ix_enable_device,
.init = i82801ix_init,
};
diff --git a/src/southbridge/intel/i82801jx/i82801jx.c b/src/southbridge/intel/i82801jx/i82801jx.c
index 6f90301419..6f10be0e9f 100644
--- a/src/southbridge/intel/i82801jx/i82801jx.c
+++ b/src/southbridge/intel/i82801jx/i82801jx.c
@@ -194,7 +194,7 @@ static void i82801jx_init(void *chip_info)
}
struct chip_operations southbridge_intel_i82801jx_ops = {
- CHIP_NAME("Intel ICH10 (82801Jx) Series Southbridge")
+ .name = "Intel ICH10 (82801Jx) Series Southbridge",
.enable_dev = i82801jx_enable_device,
.init = i82801jx_init,
};
diff --git a/src/southbridge/intel/i82870/pcibridge.c b/src/southbridge/intel/i82870/pcibridge.c
index 00bf6bb1cf..4ca801027c 100644
--- a/src/southbridge/intel/i82870/pcibridge.c
+++ b/src/southbridge/intel/i82870/pcibridge.c
@@ -38,5 +38,5 @@ static const struct pci_driver pcix_driver __pci_driver = {
};
struct chip_operations southbridge_intel_i82870_ops = {
- CHIP_NAME("Intel 82870")
+ .name = "Intel 82870",
};
diff --git a/src/southbridge/intel/ibexpeak/pch.c b/src/southbridge/intel/ibexpeak/pch.c
index 23768edabe..f77dc629cf 100644
--- a/src/southbridge/intel/ibexpeak/pch.c
+++ b/src/southbridge/intel/ibexpeak/pch.c
@@ -84,6 +84,6 @@ void pch_enable(struct device *dev)
}
struct chip_operations southbridge_intel_ibexpeak_ops = {
- CHIP_NAME("Intel Series 5 (Ibexpeak) Southbridge")
+ .name = "Intel Series 5 (Ibexpeak) Southbridge",
.enable_dev = pch_enable,
};
diff --git a/src/southbridge/intel/lynxpoint/pch.c b/src/southbridge/intel/lynxpoint/pch.c
index 8b037a9dd0..ae4e71481f 100644
--- a/src/southbridge/intel/lynxpoint/pch.c
+++ b/src/southbridge/intel/lynxpoint/pch.c
@@ -199,7 +199,7 @@ void pch_enable(struct device *dev)
}
struct chip_operations southbridge_intel_lynxpoint_ops = {
- CHIP_NAME("Intel Series 8 (Lynx Point) Southbridge")
+ .name = "Intel Series 8 (Lynx Point) Southbridge",
.enable_dev = pch_enable,
};
diff --git a/src/southbridge/ricoh/rl5c476/rl5c476.c b/src/southbridge/ricoh/rl5c476/rl5c476.c
index 23476ece2c..f78f816cfc 100644
--- a/src/southbridge/ricoh/rl5c476/rl5c476.c
+++ b/src/southbridge/ricoh/rl5c476/rl5c476.c
@@ -215,6 +215,6 @@ static void southbridge_init(struct device *dev)
}
struct chip_operations southbridge_ricoh_rl5c476_ops = {
- CHIP_NAME("Ricoh RL5C476 CardBus Controller")
+ .name = "Ricoh RL5C476 CardBus Controller",
.enable_dev = southbridge_init,
};
diff --git a/src/southbridge/ti/pci1x2x/pci1x2x.c b/src/southbridge/ti/pci1x2x/pci1x2x.c
index ccd3ce941d..55d37af319 100644
--- a/src/southbridge/ti/pci1x2x/pci1x2x.c
+++ b/src/southbridge/ti/pci1x2x/pci1x2x.c
@@ -73,5 +73,5 @@ static const struct pci_driver ti_pci1520_driver __pci_driver = {
};
struct chip_operations southbridge_ti_pci1x2x_ops = {
- CHIP_NAME("TI PCI1x2x Cardbus controller")
+ .name = "TI PCI1x2x Cardbus controller",
};
diff --git a/src/southbridge/ti/pci7420/cardbus.c b/src/southbridge/ti/pci7420/cardbus.c
index 6ef08a3067..16fdf4404f 100644
--- a/src/southbridge/ti/pci7420/cardbus.c
+++ b/src/southbridge/ti/pci7420/cardbus.c
@@ -80,5 +80,5 @@ static const struct pci_driver ti_pci7620_driver __pci_driver = {
};
struct chip_operations southbridge_ti_pci7420_ops = {
- CHIP_NAME("Texas Instruments PCI7420/7620 Cardbus Controller")
+ .name = "Texas Instruments PCI7420/7620 Cardbus Controller",
};