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authorleo.chou <leo.chou@lcfc.corp-partner.google.com>2022-05-13 10:41:03 +0800
committerFelix Held <felix-coreboot@felixheld.de>2022-05-25 18:54:56 +0000
commitaef916a5474bd5d30d4f63f4a2aa556586fcfd2a (patch)
tree7c9c7671c8a36824881218e7c57493f8aba172da /src/southbridge
parent288f761a93c9da20ee5aeccad0c3c404d3dc697c (diff)
soc/intel/alderlake: Add chip config for DPA PreWake
The FSP includes a UPD to set the DPA (Dynamic Periodicity Alteration) PreWake value, which can be used to set the maximum pre-wake randomization time in "micro-ticks". This patch adds support for configuring that value. BUG=b:228410327 TEST=build FW and checked DPA value by fsp log. Signed-off-by: leo.chou <leo.chou@lcfc.corp-partner.google.com> Change-Id: I08897c590a88aba058cb9e364185ea0794e1e7c3 Reviewed-on: https://review.coreboot.org/c/coreboot/+/64316 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
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