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authorVladimir Serbinenko <phcoder@gmail.com>2014-08-31 01:09:12 +0200
committerVladimir Serbinenko <phcoder@gmail.com>2014-09-05 20:43:52 +0200
commita4857052f756507e18a54beba704f183f128a057 (patch)
tree08e207335ddbc457bc4c3b61a9fd87c68756eb94 /src/southbridge
parentc403e42f21bc77af6db3a4222e796c102ac7e6d0 (diff)
i82801gx: Kill unused TCG and SMI1
SMI1 is being written to but never read from. Change-Id: I82c0800713e3093eb1317b5e1f6f228771134857 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/6808 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/southbridge')
-rw-r--r--src/southbridge/intel/i82801gx/smi.c2
-rw-r--r--src/southbridge/intel/i82801gx/smihandler.c19
2 files changed, 2 insertions, 19 deletions
diff --git a/src/southbridge/intel/i82801gx/smi.c b/src/southbridge/intel/i82801gx/smi.c
index 8cb11b278f..134c232c5d 100644
--- a/src/southbridge/intel/i82801gx/smi.c
+++ b/src/southbridge/intel/i82801gx/smi.c
@@ -387,7 +387,5 @@ void smm_setup_structures(void *gnvs, void *tcg, void *smi1)
* after we relocated the GNVS, so this is not troublesome.
*/
*(u32 *)0x500 = (u32)gnvs;
- *(u32 *)0x504 = (u32)tcg;
- *(u32 *)0x508 = (u32)smi1;
outb(0xea, 0xb2);
}
diff --git a/src/southbridge/intel/i82801gx/smihandler.c b/src/southbridge/intel/i82801gx/smihandler.c
index ba4d0148e4..cccfe150fb 100644
--- a/src/southbridge/intel/i82801gx/smihandler.c
+++ b/src/southbridge/intel/i82801gx/smihandler.c
@@ -49,8 +49,6 @@ u8 smm_initialized = 0;
* by coreboot.
*/
global_nvs_t *gnvs = (global_nvs_t *)0x0;
-void *tcg = (void *)0x0;
-void *smi1 = (void *)0x0;
/**
* @brief read and clear PM1_STS
@@ -407,10 +405,8 @@ static void southbridge_smi_apmc(unsigned int node, smm_state_save_area_t *state
return;
}
gnvs = *(global_nvs_t **)0x500;
- tcg = *(void **)0x504;
- smi1 = *(void **)0x508;
smm_initialized = 1;
- printk(BIOS_DEBUG, "SMI#: Setting up structures to %p, %p, %p\n", gnvs, tcg, smi1);
+ printk(BIOS_DEBUG, "SMI#: Setting up structures to %p\n", gnvs);
break;
default:
printk(BIOS_DEBUG, "SMI#: Unknown function APM_CNT=%02x\n", reg8);
@@ -558,18 +554,7 @@ static void southbridge_smi_monitor(unsigned int node, smm_state_save_area_t *st
/* IOTRAP(2) currently unused
* IOTRAP(1) currently unused */
- /* IOTRAP(0) SMIC */
- if (IOTRAP(0)) {
- if (!(trap_cycle & (1 << 24))) { // It's a write
- printk(BIOS_DEBUG, "SMI1 command\n");
- data = RCBA32(0x1e18);
- data &= mask;
- // if (smi1)
- // southbridge_smi_command(data);
- // return;
- }
- // Fall through to debug
- }
+ /* IOTRAP(0) SMIC: currently unused */
printk(BIOS_DEBUG, " trapped io address = 0x%x\n", trap_cycle & 0xfffc);
for (i=0; i < 4; i++) if(IOTRAP(i)) printk(BIOS_DEBUG, " TRAPĀ = %d\n", i);