diff options
| author | Angel Pons <th3fanbus@gmail.com> | 2020-06-21 16:20:15 +0200 |
|---|---|---|
| committer | Angel Pons <th3fanbus@gmail.com> | 2020-07-22 08:27:33 +0000 |
| commit | 8d5cedf0463fc9450966b8326bbdbbf62fbb4b2d (patch) | |
| tree | 8e9e887a7321e068bfddabd586c48a27dba126af /src/southbridge | |
| parent | 27387c3cf5c681b1f52fd45ebe232df593e5d052 (diff) | |
sb/intel/i82801jx: Drop `docking_supported`
The three mainboards using this southbridge are desktop boards, which
are not dockable. The Dell Precision M6400 laptop is dockable, but even
though it has an Eaglelake MCH, it uses an i82801ix southbridge instead.
So, one could still port that laptop to coreboot after this change! :P
Also, drop the now-unnecessary `chip` and `dev` variables.
Change-Id: Ic9ab497c91d66032929190cde22d59a208887f50
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42657
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/southbridge')
| -rw-r--r-- | src/southbridge/intel/i82801jx/chip.h | 1 | ||||
| -rw-r--r-- | src/southbridge/intel/i82801jx/fadt.c | 7 |
2 files changed, 1 insertions, 7 deletions
diff --git a/src/southbridge/intel/i82801jx/chip.h b/src/southbridge/intel/i82801jx/chip.h index ba8d007fb7..cdc1cc5101 100644 --- a/src/southbridge/intel/i82801jx/chip.h +++ b/src/southbridge/intel/i82801jx/chip.h @@ -48,7 +48,6 @@ struct southbridge_intel_i82801jx_config { int c4onc3_enable:1; int c5_enable : 1; int c6_enable : 1; - int docking_supported:1; int throttle_duty : 3; diff --git a/src/southbridge/intel/i82801jx/fadt.c b/src/southbridge/intel/i82801jx/fadt.c index d99872d396..fd556615ca 100644 --- a/src/southbridge/intel/i82801jx/fadt.c +++ b/src/southbridge/intel/i82801jx/fadt.c @@ -5,13 +5,10 @@ #include <cpu/x86/smm.h> #include <version.h> #include <southbridge/intel/common/pmutil.h> -#include "chip.h" void acpi_fill_fadt(acpi_fadt_t *fadt) { - struct device *dev = pcidev_on_root(0x1f, 0); - struct southbridge_intel_i82801jx_config *chip = dev->chip_info; - u16 pmbase = pci_read_config16(dev, 0x40) & 0xfffe; + u16 pmbase = pci_read_config16(pcidev_on_root(0x1f, 0), 0x40) & 0xfffe; fadt->sci_int = 0x9; @@ -46,8 +43,6 @@ void acpi_fill_fadt(acpi_fadt_t *fadt) fadt->flags |= (ACPI_FADT_WBINVD | ACPI_FADT_C1_SUPPORTED | ACPI_FADT_SLEEP_BUTTON | ACPI_FADT_S4_RTC_WAKE | ACPI_FADT_PLATFORM_CLOCK | ACPI_FADT_C2_MP_SUPPORTED); - if (chip->docking_supported) - fadt->flags |= ACPI_FADT_DOCKING_SUPPORTED; fadt->x_pm1a_evt_blk.space_id = ACPI_ADDRESS_SPACE_IO; fadt->x_pm1a_evt_blk.bit_width = 32; |