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authorSven Schnelle <svens@stackframe.org>2011-06-29 15:05:28 +0200
committerPatrick Georgi <patrick@georgi-clan.de>2011-06-29 16:54:14 +0200
commit811787abd5ec0c944a77ad1dda8817c95948b0c4 (patch)
tree28dc98edcc2aa901708ab8e18c00a241a4f74f92 /src/southbridge
parent55bf2e49d66af779e3e514db1bd716b354329559 (diff)
i82801gx: read RTC status register to prevent IRQ storm
My Thinkpad appeared dead. After investigation, it turned out that the RTC Alarm was triggering an RTC PM1 SMI, but the SMI handler didn't read the status register, so it was triggered again. This is a really nasty situation, as it means you have to dissemble your Notebook just to unplug the RTC battery. Change-Id: I5ac611e8a72deb5f38c86486dbe0693804935723 Signed-off-by: Sven Schnelle <svens@stackframe.org> Reviewed-on: http://review.coreboot.org/67 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'src/southbridge')
-rw-r--r--src/southbridge/intel/i82801gx/smihandler.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/src/southbridge/intel/i82801gx/smihandler.c b/src/southbridge/intel/i82801gx/smihandler.c
index 434bfebc18..48375e451d 100644
--- a/src/southbridge/intel/i82801gx/smihandler.c
+++ b/src/southbridge/intel/i82801gx/smihandler.c
@@ -26,6 +26,7 @@
#include <cpu/x86/cache.h>
#include <cpu/x86/smm.h>
#include <device/pci_def.h>
+#include <pc80/mc146818rtc.h>
#include "i82801gx.h"
/* I945 */
@@ -410,6 +411,7 @@ static void southbridge_smi_apmc(unsigned int node, smm_state_save_area_t *state
static void southbridge_smi_pm1(unsigned int node, smm_state_save_area_t *state_save)
{
u16 pm1_sts;
+ volatile u8 cmos_status;
pm1_sts = reset_pm1_status();
dump_pm1_status(pm1_sts);
@@ -423,6 +425,12 @@ static void southbridge_smi_pm1(unsigned int node, smm_state_save_area_t *state_
reg32 = (7 << 10) | (1 << 13);
outl(reg32, pmbase + PM1_CNT);
}
+
+ if (pm1_sts & RTC_STS) {
+ /* read RTC status register to disable the interrupt */
+ cmos_status = cmos_read(RTC_REG_C);
+ printk(BIOS_DEBUG, "RTC IRQ status: %02X\n", cmos_status);
+ }
}
static void southbridge_smi_gpe0(unsigned int node, smm_state_save_area_t *state_save)