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authorAntonello Dettori <dev@dettori.io>2016-09-03 10:45:33 +0200
committerMartin Roth <martinroth@google.com>2016-09-10 04:55:52 +0200
commit4e1d9f6b23a6a0152d7aab77dc3cc68ad776feb6 (patch)
tree347b766e7dbe01abf5b3d8745ae93ac34ba4aa18 /src/southbridge
parentd3b55c1bb514fcf2ffd04b09be4f0baa2c93ffbc (diff)
southbridge/intel/i3100: transition away from device_t
Replace the use of the old device_t definition inside southbridge/intel/i3100. Change-Id: Ic9616d5135cfb7206e086e51aaf82eb66540c4bb Signed-off-by: Antonello Dettori <dev@dettori.io> Reviewed-on: https://review.coreboot.org/16482 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/southbridge')
-rw-r--r--src/southbridge/intel/i3100/early_smbus.c2
-rw-r--r--src/southbridge/intel/i3100/i3100.h2
2 files changed, 3 insertions, 1 deletions
diff --git a/src/southbridge/intel/i3100/early_smbus.c b/src/southbridge/intel/i3100/early_smbus.c
index 2cb241a138..35c32a41c1 100644
--- a/src/southbridge/intel/i3100/early_smbus.c
+++ b/src/southbridge/intel/i3100/early_smbus.c
@@ -20,7 +20,7 @@
static void enable_smbus(void)
{
- device_t dev = PCI_DEV(0x0, 0x1f, 0x3);
+ pci_devfn_t dev = PCI_DEV(0x0, 0x1f, 0x3);
printk(BIOS_SPEW, "SMBus controller enabled\n");
pci_write_config32(dev, 0x20, SMBUS_IO_BASE | 1);
diff --git a/src/southbridge/intel/i3100/i3100.h b/src/southbridge/intel/i3100/i3100.h
index 85b30b6bc6..297a2a688d 100644
--- a/src/southbridge/intel/i3100/i3100.h
+++ b/src/southbridge/intel/i3100/i3100.h
@@ -36,6 +36,8 @@
#define SATA_MODE_IDE 0x00
#define SATA_MODE_AHCI 0x01
+#ifndef __SIMPLE_DEVICE__
void i3100_enable(device_t dev);
+#endif
#endif