diff options
| author | Zheng Bao <fishbaozi@gmail.com> | 2013-02-17 17:01:34 +0800 |
|---|---|---|
| committer | Marc Jones <marcj303@gmail.com> | 2013-02-19 01:24:09 +0100 |
| commit | f57d0dce95e258e6c065ceac32b9ce0935a141cb (patch) | |
| tree | 08d248a8b8f637343dc33200ee4ccab68824e15d /src/southbridge | |
| parent | 832452a7ea71af1cba160fdb34c1856c7c9216fd (diff) | |
AMD S3: Change S3_VOLATILE_POS to S3_DATA_POS
S3_DATA_POS defines address where the whole S3 data is stored.
Change-Id: I4155a0821e74a3653caaead890e5fec5677637aa
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: http://review.coreboot.org/2438
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
Reviewed-by: Dave Frodin <dave.frodin@se-eng.com>
Reviewed-by: Marc Jones <marcj303@gmail.com>
Diffstat (limited to 'src/southbridge')
| -rw-r--r-- | src/southbridge/amd/Makefile.inc | 4 | ||||
| -rw-r--r-- | src/southbridge/amd/agesa/hudson/Kconfig | 2 | ||||
| -rw-r--r-- | src/southbridge/amd/cimx/sb700/Kconfig | 2 | ||||
| -rw-r--r-- | src/southbridge/amd/cimx/sb800/Kconfig | 2 | ||||
| -rwxr-xr-x | src/southbridge/amd/cimx/sb900/Kconfig | 2 |
5 files changed, 6 insertions, 6 deletions
diff --git a/src/southbridge/amd/Makefile.inc b/src/southbridge/amd/Makefile.inc index 1b2cb1f2f7..5f5431492c 100644 --- a/src/southbridge/amd/Makefile.inc +++ b/src/southbridge/amd/Makefile.inc @@ -20,14 +20,14 @@ ifeq ($(CONFIG_HAVE_ACPI_RESUME), y) ifeq ($(CONFIG_CPU_AMD_AGESA), y) $(obj)/coreboot_s3nv.rom: $(obj)/config.h - echo " S3 NVRAM $(CONFIG_S3_VOLATILE_POS) (S3 storage area)" + echo " S3 NVRAM $(CONFIG_S3_DATA_POS) (S3 storage area)" # force C locale, so cygwin awk doesn't try to interpret the 0xff below as UTF-8 (or worse) LC_ALL=C awk 'BEGIN {for (i=0; i<32768; i++) {printf "%c", 255}}' > $@.tmp mv $@.tmp $@ cbfs-files-y += s3nv s3nv-file := $(obj)/coreboot_s3nv.rom -s3nv-position := $(CONFIG_S3_VOLATILE_POS) +s3nv-position := $(CONFIG_S3_DATA_POS) s3nv-type := raw endif # CONFIG_CPU_AMD_AGESA == y diff --git a/src/southbridge/amd/agesa/hudson/Kconfig b/src/southbridge/amd/agesa/hudson/Kconfig index 35d899634c..a4699707e4 100644 --- a/src/southbridge/amd/agesa/hudson/Kconfig +++ b/src/southbridge/amd/agesa/hudson/Kconfig @@ -204,7 +204,7 @@ config RAID_MISC_ROM_POSITION The CONFIG_ROM_SIZE must larger than 0x100000. endif # HUDSON_SATA_RAID -config S3_VOLATILE_POS +config S3_DATA_POS hex "S3 volatile storage position" default 0xFFFF0000 depends on HAVE_ACPI_RESUME diff --git a/src/southbridge/amd/cimx/sb700/Kconfig b/src/southbridge/amd/cimx/sb700/Kconfig index ee740d5964..706309d389 100644 --- a/src/southbridge/amd/cimx/sb700/Kconfig +++ b/src/southbridge/amd/cimx/sb700/Kconfig @@ -60,7 +60,7 @@ config REDIRECT_SBCIMX_TRACE_TO_SERIAL Warning: Only enable this option when debuging or tracing AMD CIMX code. -config S3_VOLATILE_POS +config S3_DATA_POS hex "S3 volatile storage position" default 0xFFFF0000 depends on HAVE_ACPI_RESUME diff --git a/src/southbridge/amd/cimx/sb800/Kconfig b/src/southbridge/amd/cimx/sb800/Kconfig index 2620974dbf..f56e017d2d 100644 --- a/src/southbridge/amd/cimx/sb800/Kconfig +++ b/src/southbridge/amd/cimx/sb800/Kconfig @@ -122,7 +122,7 @@ config RAID_MISC_ROM_POSITION endif -config S3_VOLATILE_POS +config S3_DATA_POS hex "S3 volatile storage position" default 0xFFFF0000 depends on HAVE_ACPI_RESUME diff --git a/src/southbridge/amd/cimx/sb900/Kconfig b/src/southbridge/amd/cimx/sb900/Kconfig index 0efbf9707c..3cadba1293 100755 --- a/src/southbridge/amd/cimx/sb900/Kconfig +++ b/src/southbridge/amd/cimx/sb900/Kconfig @@ -53,7 +53,7 @@ config BOOTBLOCK_SOUTHBRIDGE_INIT string default "southbridge/amd/cimx/sb900/bootblock.c" -config S3_VOLATILE_POS +config S3_DATA_POS hex "S3 volatile storage position" default 0xFFFF0000 depends on HAVE_ACPI_RESUME |