src: Add missing include <stdint.h>

Change-Id: Idf10a09745756887a517da4c26db7a90a1bf9543
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/29403
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>

8 files changed, 16 insertions, 0 deletions

diff --git a/src/southbridge/intel/bd82x6x/chip.h b/src/southbridge/intel/bd82x6x/chip.h
index ce8a804d50..29f6881fc2 100644
--- a/src/southbridge/intel/bd82x6x/chip.h
+++ b/src/southbridge/intel/bd82x6x/chip.h
@@ -16,6 +16,8 @@
 #ifndef SOUTHBRIDGE_INTEL_BD82X6X_CHIP_H
 #define SOUTHBRIDGE_INTEL_BD82X6X_CHIP_H
 
+#include <stdint.h>
+
 struct southbridge_intel_bd82x6x_config {
 	/**
 	 * GPI Routing configuration
diff --git a/src/southbridge/intel/fsp_bd82x6x/chip.h b/src/southbridge/intel/fsp_bd82x6x/chip.h
index 9d6a9e4dbd..8da39368f5 100644
--- a/src/southbridge/intel/fsp_bd82x6x/chip.h
+++ b/src/southbridge/intel/fsp_bd82x6x/chip.h
@@ -16,6 +16,8 @@
 #ifndef SOUTHBRIDGE_INTEL_FSP_BD82X6X_CHIP_H
 #define SOUTHBRIDGE_INTEL_FSP_BD82X6X_CHIP_H
 
+#include <stdint.h>
+
 struct southbridge_intel_fsp_bd82x6x_config {
 	/**
 	 * Interrupt Routing configuration
diff --git a/src/southbridge/intel/fsp_i89xx/chip.h b/src/southbridge/intel/fsp_i89xx/chip.h
index 69e1dc77cf..bea3e072f2 100644
--- a/src/southbridge/intel/fsp_i89xx/chip.h
+++ b/src/southbridge/intel/fsp_i89xx/chip.h
@@ -16,6 +16,8 @@
 #ifndef SOUTHBRIDGE_INTEL_I89XX_CHIP_H
 #define SOUTHBRIDGE_INTEL_I89XX_CHIP_H
 
+#include <stdint.h>
+
 struct southbridge_intel_fsp_i89xx_config {
 	/**
 	 * Interrupt Routing configuration
diff --git a/src/southbridge/intel/i82801dx/chip.h b/src/southbridge/intel/i82801dx/chip.h
index f77413d671..a0961ee76d 100644
--- a/src/southbridge/intel/i82801dx/chip.h
+++ b/src/southbridge/intel/i82801dx/chip.h
@@ -17,6 +17,8 @@
 #ifndef I82801DX_CHIP_H
 #define I82801DX_CHIP_H
 
+#include <stdint.h>
+
 struct southbridge_intel_i82801dx_config {
 	int enable_usb;
 	int enable_native_ide;
diff --git a/src/southbridge/intel/i82801gx/chip.h b/src/southbridge/intel/i82801gx/chip.h
index e89fcc4d05..3a20ab1cb3 100644
--- a/src/southbridge/intel/i82801gx/chip.h
+++ b/src/southbridge/intel/i82801gx/chip.h
@@ -16,6 +16,8 @@
 #ifndef SOUTHBRIDGE_INTEL_I82801GX_CHIP_H
 #define SOUTHBRIDGE_INTEL_I82801GX_CHIP_H
 
+#include <stdint.h>
+
 struct southbridge_intel_i82801gx_config {
 	/**
 	 * Interrupt Routing configuration
diff --git a/src/southbridge/intel/i82801ix/chip.h b/src/southbridge/intel/i82801ix/chip.h
index 307b751fab..0b3e0b5a50 100644
--- a/src/southbridge/intel/i82801ix/chip.h
+++ b/src/southbridge/intel/i82801ix/chip.h
@@ -17,6 +17,8 @@
 #ifndef SOUTHBRIDGE_INTEL_I82801IX_CHIP_H
 #define SOUTHBRIDGE_INTEL_I82801IX_CHIP_H
 
+#include <stdint.h>
+
 enum {
 	THTL_DEF = 0, THTL_87_5 = 1, THTL_75_0 = 2, THTL_62_5 = 3,
 	THTL_50_0 = 4, THTL_37_5 = 5, THTL_25_0 = 6, THTL_12_5 = 7
diff --git a/src/southbridge/intel/i82801jx/chip.h b/src/southbridge/intel/i82801jx/chip.h
index 533254a872..1712b8162c 100644
--- a/src/southbridge/intel/i82801jx/chip.h
+++ b/src/southbridge/intel/i82801jx/chip.h
@@ -17,6 +17,8 @@
 #ifndef SOUTHBRIDGE_INTEL_I82801JX_CHIP_H
 #define SOUTHBRIDGE_INTEL_I82801JX_CHIP_H
 
+#include <stdint.h>
+
 enum {
 	THTL_DEF = 0, THTL_87_5 = 1, THTL_75_0 = 2, THTL_62_5 = 3,
 	THTL_50_0 = 4, THTL_37_5 = 5, THTL_25_0 = 6, THTL_12_5 = 7
diff --git a/src/southbridge/intel/lynxpoint/chip.h b/src/southbridge/intel/lynxpoint/chip.h
index d11ce5fcee..09f1c90469 100644
--- a/src/southbridge/intel/lynxpoint/chip.h
+++ b/src/southbridge/intel/lynxpoint/chip.h
@@ -16,6 +16,8 @@
 #ifndef SOUTHBRIDGE_INTEL_LYNXPOINT_CHIP_H
 #define SOUTHBRIDGE_INTEL_LYNXPOINT_CHIP_H
 
+#include <stdint.h>
+
 struct southbridge_intel_lynxpoint_config {
 	/**
 	 * Interrupt Routing configuration