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authorGabe Black <gabeblack@google.com>2013-06-22 20:05:37 -0700
committerStefan Reinauer <stefan.reinauer@coreboot.org>2013-07-10 22:50:27 +0200
commit2d2e37fc526741a7308b88c794729295a2c5e3cd (patch)
treee54aa41a1bafe30939065c0fc1f68246c40623da /src/southbridge
parentcf7509cfd1c775f4ee664f7784257c73bffd1513 (diff)
exynos5420: Change some clock settings.
This change adjusts some clock settings so that they match U-Boot. There are three different changes. 1. Change the source for psgen from the oscillator clock to the pclk. 2. Change the pll feeding the SPI busses from epll to mpll, as suggested in the manual. 3. Change the SPI prescaller. Change-Id: Ib54a255bc14fc286629dac86db9b8cf8e75a610b Signed-off-by: Gabe Black <gabeblack@chromium.org> Reviewed-on: http://review.coreboot.org/3700 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/southbridge')
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