diff options
| author | Aaron Durbin <adurbin@chromium.org> | 2014-11-06 09:58:07 -0600 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2015-07-07 20:07:49 +0200 |
| commit | 06f1f8fed62408cebf3ea32bcb486e5bcb450c23 (patch) | |
| tree | 7781a7274776c2d77416a998948d24372c1fbe3c /src/southbridge | |
| parent | 3957ddc41408a85a509b9f0f39b2aafc05c6eb18 (diff) | |
timestamp: remove conditional #if CONFIG_COLLECT_TIMESTAMPS
Empty functions are provided when !CONFIG_COLLECT_TIMESTAMPS
so stop guarding the compilation.
BUG=None
BRANCH=None
TEST=Built
Original-Change-Id: Ib0f23e1204e048a9b928568da02e9661f6aa0a35
Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/228190
Original-Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
(cherry picked from commit 9aa69fd43d77f5f7acdc9f361016c595dd16104e)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Change-Id: I14418c8ef3ccb57ac6fce05b422e1c21b1d38392
Reviewed-on: http://review.coreboot.org/10742
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/southbridge')
| -rw-r--r-- | src/southbridge/intel/bd82x6x/bootblock.c | 3 | ||||
| -rw-r--r-- | src/southbridge/intel/fsp_bd82x6x/bootblock.c | 3 | ||||
| -rw-r--r-- | src/southbridge/intel/i82801gx/bootblock.c | 3 | ||||
| -rw-r--r-- | src/southbridge/intel/lynxpoint/bootblock.c | 3 |
4 files changed, 4 insertions, 8 deletions
diff --git a/src/southbridge/intel/bd82x6x/bootblock.c b/src/southbridge/intel/bd82x6x/bootblock.c index 4df6bb57e0..18532df992 100644 --- a/src/southbridge/intel/bd82x6x/bootblock.c +++ b/src/southbridge/intel/bd82x6x/bootblock.c @@ -86,9 +86,8 @@ static void set_spi_speed(void) static void bootblock_southbridge_init(void) { -#if CONFIG_COLLECT_TIMESTAMPS store_initial_timestamp(); -#endif + enable_spi_prefetch(); enable_port80_on_lpc(); set_spi_speed(); diff --git a/src/southbridge/intel/fsp_bd82x6x/bootblock.c b/src/southbridge/intel/fsp_bd82x6x/bootblock.c index 46aa58f4ef..8f6ddbc67f 100644 --- a/src/southbridge/intel/fsp_bd82x6x/bootblock.c +++ b/src/southbridge/intel/fsp_bd82x6x/bootblock.c @@ -87,9 +87,8 @@ static void set_spi_speed(void) static void bootblock_southbridge_init(void) { -#if CONFIG_COLLECT_TIMESTAMPS store_initial_timestamp(); -#endif + enable_spi_prefetch(); enable_port80_on_lpc(); set_spi_speed(); diff --git a/src/southbridge/intel/i82801gx/bootblock.c b/src/southbridge/intel/i82801gx/bootblock.c index 64c4410a3e..dde1ae9c82 100644 --- a/src/southbridge/intel/i82801gx/bootblock.c +++ b/src/southbridge/intel/i82801gx/bootblock.c @@ -47,9 +47,8 @@ static void enable_spi_prefetch(void) static void bootblock_southbridge_init(void) { -#if CONFIG_COLLECT_TIMESTAMPS store_initial_timestamp(); -#endif + enable_spi_prefetch(); /* Enable RCBA */ diff --git a/src/southbridge/intel/lynxpoint/bootblock.c b/src/southbridge/intel/lynxpoint/bootblock.c index 6727173ed3..8c2133b584 100644 --- a/src/southbridge/intel/lynxpoint/bootblock.c +++ b/src/southbridge/intel/lynxpoint/bootblock.c @@ -87,9 +87,8 @@ static void set_spi_speed(void) static void bootblock_southbridge_init(void) { -#if CONFIG_COLLECT_TIMESTAMPS store_initial_timestamp(); -#endif + map_rcba(); enable_spi_prefetch(); enable_port80_on_lpc(); |