diff options
author | Angel Pons <th3fanbus@gmail.com> | 2021-01-28 13:40:02 +0100 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2021-02-01 09:03:50 +0000 |
commit | cf445ea89b967a0a7a0d1b365c23d2d2802899ff (patch) | |
tree | b570dbd17660ac905c2692c9451fb186da417134 /src/southbridge | |
parent | 7d66b39513846ca767d4c5b46a0ad3193a8afccb (diff) |
sb/intel/common/rcba.h: Guard RCBAx macro parameters
Add brackets around the parameters to avoid operation order problems.
Change-Id: I689983b5b937f66b1a520eea61a38fb96c13c007
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50035
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge')
-rw-r--r-- | src/southbridge/intel/common/rcba.h | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/southbridge/intel/common/rcba.h b/src/southbridge/intel/common/rcba.h index 51c404601a..712a477cc1 100644 --- a/src/southbridge/intel/common/rcba.h +++ b/src/southbridge/intel/common/rcba.h @@ -11,10 +11,10 @@ #define RCBA 0xf0 #define RCBA_ENABLE 0x01 -#define RCBA8(x) (*((volatile u8 *)(DEFAULT_RCBA + x))) -#define RCBA16(x) (*((volatile u16 *)(DEFAULT_RCBA + x))) -#define RCBA32(x) (*((volatile u32 *)(DEFAULT_RCBA + x))) -#define RCBA64(x) (*((volatile u64 *)(DEFAULT_RCBA + x))) +#define RCBA8(x) (*((volatile u8 *)(DEFAULT_RCBA + (x)))) +#define RCBA16(x) (*((volatile u16 *)(DEFAULT_RCBA + (x)))) +#define RCBA32(x) (*((volatile u32 *)(DEFAULT_RCBA + (x)))) +#define RCBA64(x) (*((volatile u64 *)(DEFAULT_RCBA + (x)))) #define RCBA_AND_OR(bits, x, and, or) \ (RCBA##bits(x) = ((RCBA##bits(x) & (and)) | (or))) |