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authorStefan Reinauer <stepan@coresystems.de>2010-04-07 02:30:57 +0000
committerStefan Reinauer <stepan@openbios.org>2010-04-07 02:30:57 +0000
commitc02c34e886afda101b522a9be34e6a7c7c4217cd (patch)
tree1ca66655c28932f0192deded855d60e099775e1d /src/southbridge
parent6c214693aa5439dcaf3f0d5b2802f1b2d931ad25 (diff)
fix epia-m700 compilation, and remove more warnings.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5366 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge')
-rw-r--r--src/southbridge/intel/i82801cx/i82801cx_lpc.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/src/southbridge/intel/i82801cx/i82801cx_lpc.c b/src/southbridge/intel/i82801cx/i82801cx_lpc.c
index 9ac3e8326b..7523b03f80 100644
--- a/src/southbridge/intel/i82801cx/i82801cx_lpc.c
+++ b/src/southbridge/intel/i82801cx/i82801cx_lpc.c
@@ -23,7 +23,7 @@
#define MAINBOARD_POWER_ON 1
-void i82801cx_enable_ioapic( struct device *dev)
+static void i82801cx_enable_ioapic( struct device *dev)
{
uint32_t dword;
volatile uint32_t* ioapic_index = (volatile uint32_t*)0xfec00000;
@@ -54,7 +54,7 @@ void i82801cx_enable_ioapic( struct device *dev)
}
// This is how interrupts are received from the Super I/O chip
-void i82801cx_enable_serial_irqs( struct device *dev)
+static void i82801cx_enable_serial_irqs( struct device *dev)
{
// Recognize serial IRQs, continuous mode, frame size 21, 4 clock start frame pulse width
pci_write_config8(dev, SERIRQ_CNTL, (1 << 7)|(1 << 6)|((21 - 17) << 2)|(0<< 0));
@@ -69,7 +69,7 @@ void i82801cx_enable_serial_irqs( struct device *dev)
// Return Value: None
// Description: Route all DMA channels to either PCI or LPC.
//
-void i82801cx_lpc_route_dma( struct device *dev, uint8_t mask)
+static void i82801cx_lpc_route_dma( struct device *dev, uint8_t mask)
{
uint16_t dmaConfig;
int channelIndex;
@@ -84,7 +84,7 @@ void i82801cx_lpc_route_dma( struct device *dev, uint8_t mask)
pci_write_config16(dev, PCI_DMA_CFG, dmaConfig);
}
-void i82801cx_rtc_init(struct device *dev)
+static void i82801cx_rtc_init(struct device *dev)
{
uint32_t dword;
int rtc_failed;
@@ -116,7 +116,7 @@ void i82801cx_rtc_init(struct device *dev)
}
-void i82801cx_1f0_misc(struct device *dev)
+static void i82801cx_1f0_misc(struct device *dev)
{
// Prevent LPC disabling, enable parity errors, and SERR# (System Error)
pci_write_config16(dev, PCI_COMMAND, 0x014f);