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authorPaul Menzel <paulepanter@users.sourceforge.net>2013-06-29 11:41:27 +0200
committerStefan Reinauer <stefan.reinauer@coreboot.org>2013-07-12 01:01:35 +0200
commit9478297afb0bad081798e716edf29a00f1ef71a1 (patch)
tree85411c09a0bf2f5bc628060d84e5be079f8543b4 /src/southbridge
parent4c3ab7376ebb2e3e18919f1ab663d317dfec9b9c (diff)
src/southbridge/intel/{lynxpoint,bd82x6x}/spi.c: correct spelling of attempted
Change-Id: Ic6f6af6298fed2f41f140a7aa62dccf98bf60927 Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: http://review.coreboot.org/3572 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/southbridge')
-rw-r--r--src/southbridge/intel/bd82x6x/spi.c2
-rw-r--r--src/southbridge/intel/lynxpoint/spi.c2
2 files changed, 2 insertions, 2 deletions
diff --git a/src/southbridge/intel/bd82x6x/spi.c b/src/southbridge/intel/bd82x6x/spi.c
index c720afeed5..320cf8cc6b 100644
--- a/src/southbridge/intel/bd82x6x/spi.c
+++ b/src/southbridge/intel/bd82x6x/spi.c
@@ -677,7 +677,7 @@ int spi_xfer(struct spi_slave *slave, const void *dout,
}
/*
- * Check if this is a write command atempting to transfer more bytes
+ * Check if this is a write command attempting to transfer more bytes
* than the controller can handle. Iterations for writes are not
* supported here because each SPI write command needs to be preceded
* and followed by other SPI commands, and this sequence is controlled
diff --git a/src/southbridge/intel/lynxpoint/spi.c b/src/southbridge/intel/lynxpoint/spi.c
index eaa17d5e21..5501efcbf0 100644
--- a/src/southbridge/intel/lynxpoint/spi.c
+++ b/src/southbridge/intel/lynxpoint/spi.c
@@ -589,7 +589,7 @@ int spi_xfer(struct spi_slave *slave, const void *dout,
}
/*
- * Check if this is a write command atempting to transfer more bytes
+ * Check if this is a write command attempting to transfer more bytes
* than the controller can handle. Iterations for writes are not
* supported here because each SPI write command needs to be preceded
* and followed by other SPI commands, and this sequence is controlled