amdfam10: Perform major include ".c" cleanup

Previously, all romstages for this northbridge family
would compile via 1 single C file with everything
included into the romstage.c file (!)

This patch separates the build into separate .o modules
and links them accordingly.

Currently compiles and links all fam10 roms without
breaking other roms.

Both DDR2 and DDR3 have been completed

TESTED on REACTS: passes all boot tests for 2 boards
 ASUS KGPE-D16
 ASUS KFSN4-DRE

Some extra changes were required to make it compile
otherwise there were unused functions in included "c" files.
This is because I needed to exchange CIMX
for the native southbridge routines. See in particular:
 advansus/a785e-i
 asus/m5a88-v
 avalue/eax-785e

A followup patch may be required to fix the above boards.
See FIXME, XXX tags

Change-Id: Id0f9849578fd0f8b1eab83aed910902c27354426
Signed-off-by: Damien Zammit <damien@zamaudio.com>
Reviewed-on: https://review.coreboot.org/17625
Tested-by: build bot (Jenkins)
Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com>
Reviewed-by: Timothy Pearson <tpearson@raptorengineering.com>

6 files changed, 4 insertions, 20 deletions

diff --git a/src/southbridge/amd/amd8111/early_ctrl.c b/src/southbridge/amd/amd8111/early_ctrl.c
index 15f3123159..f451003aee 100644
--- a/src/southbridge/amd/amd8111/early_ctrl.c
+++ b/src/southbridge/amd/amd8111/early_ctrl.c
@@ -2,7 +2,7 @@
 #include <reset.h>
 
 /* by yhlu 2005.10 */
-static unsigned get_sbdn(unsigned bus)
+unsigned get_sbdn(unsigned bus)
 {
 	pci_devfn_t dev;
 
diff --git a/src/southbridge/amd/sb700/early_setup.c b/src/southbridge/amd/sb700/early_setup.c
index e549e8a203..f20c1e1dfd 100644
--- a/src/southbridge/amd/sb700/early_setup.c
+++ b/src/southbridge/amd/sb700/early_setup.c
@@ -30,6 +30,8 @@
 #include "sb700.h"
 #include "smbus.h"
 
+u32 get_sbdn(u32 bus);
+
 static void pmio_write(u8 reg, u8 value)
 {
 	outb(reg, PM_INDEX);
diff --git a/src/southbridge/amd/sb700/sb700.h b/src/southbridge/amd/sb700/sb700.h
index 191dff116d..6b34502b37 100644
--- a/src/southbridge/amd/sb700/sb700.h
+++ b/src/southbridge/amd/sb700/sb700.h
@@ -84,6 +84,5 @@ void set_lpc_sticky_ctl(bool enable);
 int s3_save_nvram_early(u32 dword, int size, int  nvram_pos);
 int s3_load_nvram_early(int size, u32 *old_dword, int nvram_pos);
 
-u32 get_sbdn(u32 bus);
 void enable_fid_change_on_sb(u32 sbbusn, u32 sbdn);
 #endif /* SB700_H */
diff --git a/src/southbridge/amd/sb800/early_setup.c b/src/southbridge/amd/sb800/early_setup.c
index 82ad621c1e..54e6ada79b 100644
--- a/src/southbridge/amd/sb800/early_setup.c
+++ b/src/southbridge/amd/sb800/early_setup.c
@@ -164,7 +164,7 @@ static void sb800_lpc_init(void)
 }
 
 /* what is its usage? */
-static u32 get_sbdn(u32 bus)
+u32 get_sbdn(u32 bus)
 {
 	pci_devfn_t dev;
 
@@ -627,11 +627,6 @@ static void sb800_early_setup(void)
 	sb800_acpi_init();
 }
 
-static int smbus_read_byte(u32 device, u32 address)
-{
-	return do_smbus_read_byte(SMBUS_IO_BASE, device, address);
-}
-
 int s3_save_nvram_early(u32 dword, int size, int  nvram_pos)
 {
 	int i;
diff --git a/src/southbridge/broadcom/bcm5785/bcm5785.h b/src/southbridge/broadcom/bcm5785/bcm5785.h
index 349c61222c..893a46ccc3 100644
--- a/src/southbridge/broadcom/bcm5785/bcm5785.h
+++ b/src/southbridge/broadcom/bcm5785/bcm5785.h
@@ -26,6 +26,5 @@ void enable_fid_change_on_sb(unsigned sbbusn, unsigned sbdn);
 #endif
 
 void ldtstop_sb(void);
-unsigned get_sbdn(unsigned bus);
 
 #endif /* BCM5785_H */
diff --git a/src/southbridge/nvidia/mcp55/early_ctrl.c b/src/southbridge/nvidia/mcp55/early_ctrl.c
index 5e75adf5bd..dabf7ad1e4 100644
--- a/src/southbridge/nvidia/mcp55/early_ctrl.c
+++ b/src/southbridge/nvidia/mcp55/early_ctrl.c
@@ -18,17 +18,6 @@
 #include <reset.h>
 #include "mcp55.h"
 
-static unsigned get_sbdn(unsigned bus)
-{
-	pci_devfn_t dev;
-
-	/* Find the device. */
-	dev = pci_locate_device_on_bus(PCI_ID(PCI_VENDOR_ID_NVIDIA,
-				       PCI_DEVICE_ID_NVIDIA_MCP55_HT), bus);
-
-	return (dev >> 15) & 0x1f;
-}
-
 void soft_reset(void)
 {
 	set_bios_reset();