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| author | Huayang Duan <huayang.duan@mediatek.com> | 2020-06-22 20:54:48 +0800 |
|---|---|---|
| committer | Hung-Te Lin <hungte@chromium.org> | 2020-12-15 01:44:14 +0000 |
| commit | 7265bab69e97a25b362d1acb0ec51970754b7f49 (patch) | |
| tree | 3c682a78339917dfe9c75b0b729c7ed7af9abc68 /src/southbridge | |
| parent | 860c68449da9a6752fedb752cacdf0ac8bd6a61d (diff) | |
soc/mediatek/mt8192: Define DRAM registers and APIs
Signed-off-by: Huayang Duan <huayang.duan@mediatek.com>
Change-Id: Ifc64fb6c60d57184c4a2f9febe765b5cb69b39ae
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44699
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge')
0 files changed, 0 insertions, 0 deletions