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authorKyösti Mälkki <kyosti.malkki@gmail.com>2014-02-09 19:21:30 +0200
committerKyösti Mälkki <kyosti.malkki@gmail.com>2014-02-16 20:10:54 +0100
commit6f6a249a75927476ba5e06bb2b0a0138e0cf63ea (patch)
tree81c789db2e93396738929c9bb3b26b84771135b6 /src/southbridge
parent6e56de3d202c2175a13c91ab2c1bc1eb0d7f652a (diff)
usbdebug: Remove EHCI_DEBUG_OFFSET
Read this variable from PCI configuration capabilities list instead. Change-Id: I0cfe981833873397c32cd3aa2af307f35f01784b Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/5176 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Diffstat (limited to 'src/southbridge')
-rw-r--r--src/southbridge/amd/agesa/hudson/Kconfig4
-rw-r--r--src/southbridge/amd/cimx/sb700/Kconfig4
-rw-r--r--src/southbridge/amd/cimx/sb800/Kconfig4
-rw-r--r--src/southbridge/amd/sb600/Kconfig4
-rw-r--r--src/southbridge/amd/sb700/Kconfig4
-rw-r--r--src/southbridge/amd/sb800/Kconfig4
-rw-r--r--src/southbridge/intel/bd82x6x/Kconfig4
-rw-r--r--src/southbridge/intel/fsp_bd82x6x/Kconfig4
-rw-r--r--src/southbridge/intel/i82801dx/Kconfig4
-rw-r--r--src/southbridge/intel/i82801ex/Kconfig4
-rw-r--r--src/southbridge/intel/i82801gx/Kconfig4
-rw-r--r--src/southbridge/intel/i82801ix/Kconfig4
-rw-r--r--src/southbridge/intel/ibexpeak/Kconfig4
-rw-r--r--src/southbridge/intel/lynxpoint/Kconfig4
-rw-r--r--src/southbridge/intel/sch/Kconfig4
-rw-r--r--src/southbridge/nvidia/ck804/Kconfig4
-rw-r--r--src/southbridge/nvidia/mcp55/Kconfig4
-rw-r--r--src/southbridge/sis/sis966/Kconfig3
18 files changed, 0 insertions, 71 deletions
diff --git a/src/southbridge/amd/agesa/hudson/Kconfig b/src/southbridge/amd/agesa/hudson/Kconfig
index 1550cb4c01..dd5120dbf7 100644
--- a/src/southbridge/amd/agesa/hudson/Kconfig
+++ b/src/southbridge/amd/agesa/hudson/Kconfig
@@ -43,10 +43,6 @@ config EHCI_BAR
hex
default 0xfef00000
-config EHCI_DEBUG_OFFSET
- hex
- default 0xe0
-
config HUDSON_XHCI_ENABLE
bool "Enable Hudson XHCI Controller"
default y
diff --git a/src/southbridge/amd/cimx/sb700/Kconfig b/src/southbridge/amd/cimx/sb700/Kconfig
index 4304357a7a..d8bad86007 100644
--- a/src/southbridge/amd/cimx/sb700/Kconfig
+++ b/src/southbridge/amd/cimx/sb700/Kconfig
@@ -54,10 +54,6 @@ config EHCI_BAR
hex
default 0xfef00000
-config EHCI_DEBUG_OFFSET
- hex
- default 0xe0
-
config BOOTBLOCK_SOUTHBRIDGE_INIT
string
default "southbridge/amd/cimx/sb700/bootblock.c"
diff --git a/src/southbridge/amd/cimx/sb800/Kconfig b/src/southbridge/amd/cimx/sb800/Kconfig
index 37aff9ef45..832655d16d 100644
--- a/src/southbridge/amd/cimx/sb800/Kconfig
+++ b/src/southbridge/amd/cimx/sb800/Kconfig
@@ -209,10 +209,6 @@ config EHCI_BAR
hex
default 0xfef00000
-config EHCI_DEBUG_OFFSET
- hex
- default 0xe0
-
choice
prompt "Fan Control"
default SB800_NO_FAN_CONTROL
diff --git a/src/southbridge/amd/sb600/Kconfig b/src/southbridge/amd/sb600/Kconfig
index fe9468d4af..4d5fff49fd 100644
--- a/src/southbridge/amd/sb600/Kconfig
+++ b/src/southbridge/amd/sb600/Kconfig
@@ -32,10 +32,6 @@ config EHCI_BAR
hex
default 0xfef00000
-config EHCI_DEBUG_OFFSET
- hex
- default 0xe0
-
choice
prompt "SATA Mode"
default SATA_MODE_IDE
diff --git a/src/southbridge/amd/sb700/Kconfig b/src/southbridge/amd/sb700/Kconfig
index b0c92dcedb..e391fc8928 100644
--- a/src/southbridge/amd/sb700/Kconfig
+++ b/src/southbridge/amd/sb700/Kconfig
@@ -45,8 +45,4 @@ config EHCI_BAR
hex
default 0xfef00000
-config EHCI_DEBUG_OFFSET
- hex
- default 0xe0
-
endif # SOUTHBRIDGE_AMD_SB700
diff --git a/src/southbridge/amd/sb800/Kconfig b/src/southbridge/amd/sb800/Kconfig
index 9547d3e7c8..24dc007404 100644
--- a/src/southbridge/amd/sb800/Kconfig
+++ b/src/southbridge/amd/sb800/Kconfig
@@ -37,8 +37,4 @@ config EHCI_BAR
hex
default 0xfef00000
-config EHCI_DEBUG_OFFSET
- hex
- default 0xe0
-
endif # SOUTHBRIDGE_AMD_SB800
diff --git a/src/southbridge/intel/bd82x6x/Kconfig b/src/southbridge/intel/bd82x6x/Kconfig
index d060dae406..9cfa5d5b26 100644
--- a/src/southbridge/intel/bd82x6x/Kconfig
+++ b/src/southbridge/intel/bd82x6x/Kconfig
@@ -41,10 +41,6 @@ config EHCI_BAR
hex
default 0xfef00000
-config EHCI_DEBUG_OFFSET
- hex
- default 0xa0
-
config DRAM_RESET_GATE_GPIO
int
default 60
diff --git a/src/southbridge/intel/fsp_bd82x6x/Kconfig b/src/southbridge/intel/fsp_bd82x6x/Kconfig
index 1a8e80ac07..b2b4929348 100644
--- a/src/southbridge/intel/fsp_bd82x6x/Kconfig
+++ b/src/southbridge/intel/fsp_bd82x6x/Kconfig
@@ -37,10 +37,6 @@ config EHCI_BAR
hex
default 0xfef00000
-config EHCI_DEBUG_OFFSET
- hex
- default 0xa0
-
config BOOTBLOCK_SOUTHBRIDGE_INIT
string
default "southbridge/intel/fsp_bd82x6x/bootblock.c"
diff --git a/src/southbridge/intel/i82801dx/Kconfig b/src/southbridge/intel/i82801dx/Kconfig
index f7f93a7c78..8ef778fad3 100644
--- a/src/southbridge/intel/i82801dx/Kconfig
+++ b/src/southbridge/intel/i82801dx/Kconfig
@@ -33,8 +33,4 @@ config EHCI_BAR
hex
default 0xfef00000
-config EHCI_DEBUG_OFFSET
- hex
- default 0x80
-
endif
diff --git a/src/southbridge/intel/i82801ex/Kconfig b/src/southbridge/intel/i82801ex/Kconfig
index e4e9160a41..caa5c79ad9 100644
--- a/src/southbridge/intel/i82801ex/Kconfig
+++ b/src/southbridge/intel/i82801ex/Kconfig
@@ -11,8 +11,4 @@ config EHCI_BAR
hex
default 0xfef00000
-config EHCI_DEBUG_OFFSET
- hex
- default 0xa0
-
endif
diff --git a/src/southbridge/intel/i82801gx/Kconfig b/src/southbridge/intel/i82801gx/Kconfig
index 62c6b436f2..777b69b600 100644
--- a/src/southbridge/intel/i82801gx/Kconfig
+++ b/src/southbridge/intel/i82801gx/Kconfig
@@ -32,10 +32,6 @@ config EHCI_BAR
hex
default 0xfef00000
-config EHCI_DEBUG_OFFSET
- hex
- default 0xa0
-
config BOOTBLOCK_SOUTHBRIDGE_INIT
string
default "southbridge/intel/i82801gx/bootblock.c"
diff --git a/src/southbridge/intel/i82801ix/Kconfig b/src/southbridge/intel/i82801ix/Kconfig
index 8a4a53ef78..493be60123 100644
--- a/src/southbridge/intel/i82801ix/Kconfig
+++ b/src/southbridge/intel/i82801ix/Kconfig
@@ -33,10 +33,6 @@ config EHCI_BAR
hex
default 0xfef00000
-config EHCI_DEBUG_OFFSET
- hex
- default 0xa0
-
config BOOTBLOCK_SOUTHBRIDGE_INIT
string
default "southbridge/intel/i82801ix/bootblock.c"
diff --git a/src/southbridge/intel/ibexpeak/Kconfig b/src/southbridge/intel/ibexpeak/Kconfig
index 97d5883222..c05fe43475 100644
--- a/src/southbridge/intel/ibexpeak/Kconfig
+++ b/src/southbridge/intel/ibexpeak/Kconfig
@@ -39,10 +39,6 @@ config EHCI_BAR
hex
default 0xfef00000
-config EHCI_DEBUG_OFFSET
- hex
- default 0xa0
-
config DRAM_RESET_GATE_GPIO
int
default 60
diff --git a/src/southbridge/intel/lynxpoint/Kconfig b/src/southbridge/intel/lynxpoint/Kconfig
index 5ff00db1e6..bfb7b734cb 100644
--- a/src/southbridge/intel/lynxpoint/Kconfig
+++ b/src/southbridge/intel/lynxpoint/Kconfig
@@ -44,10 +44,6 @@ config EHCI_BAR
hex
default 0xe8000000
-config EHCI_DEBUG_OFFSET
- hex
- default 0xa0
-
config BOOTBLOCK_SOUTHBRIDGE_INIT
string
default "southbridge/intel/lynxpoint/bootblock.c"
diff --git a/src/southbridge/intel/sch/Kconfig b/src/southbridge/intel/sch/Kconfig
index 432fb8d566..d320a53332 100644
--- a/src/southbridge/intel/sch/Kconfig
+++ b/src/southbridge/intel/sch/Kconfig
@@ -30,10 +30,6 @@ config EHCI_BAR
hex
default 0xfef00000
-config EHCI_DEBUG_OFFSET
- hex
- default 0xa0
-
config HAVE_CMC
bool "Add a CMC state machine binary"
help
diff --git a/src/southbridge/nvidia/ck804/Kconfig b/src/southbridge/nvidia/ck804/Kconfig
index b6f718ee1b..e21f79e655 100644
--- a/src/southbridge/nvidia/ck804/Kconfig
+++ b/src/southbridge/nvidia/ck804/Kconfig
@@ -14,10 +14,6 @@ config EHCI_BAR
hex
default 0xfef00000
-config EHCI_DEBUG_OFFSET
- hex
- default 0x98
-
config CK804_USE_NIC
bool
default n
diff --git a/src/southbridge/nvidia/mcp55/Kconfig b/src/southbridge/nvidia/mcp55/Kconfig
index cd6009de67..89aa45258a 100644
--- a/src/southbridge/nvidia/mcp55/Kconfig
+++ b/src/southbridge/nvidia/mcp55/Kconfig
@@ -14,10 +14,6 @@ config EHCI_BAR
hex
default 0xfef00000
-config EHCI_DEBUG_OFFSET
- hex
- default 0x98
-
config MCP55_USE_NIC
bool
default n
diff --git a/src/southbridge/sis/sis966/Kconfig b/src/southbridge/sis/sis966/Kconfig
index 03dd6b1fd6..1fbd57d7dc 100644
--- a/src/southbridge/sis/sis966/Kconfig
+++ b/src/southbridge/sis/sis966/Kconfig
@@ -12,6 +12,3 @@ config EHCI_BAR
hex
default 0xfef00000 if SOUTHBRIDGE_SIS_SIS966
-config EHCI_DEBUG_OFFSET
- hex
- default 0x98 if SOUTHBRIDGE_SIS_SIS966