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authorRonald G. Minnich <rminnich@gmail.com>2012-11-27 11:32:38 -0800
committerRonald G. Minnich <rminnich@gmail.com>2012-11-28 07:57:17 +0100
commit5079a0d32f2824445cf593dfbcb65598eaa97dee (patch)
tree2e6edd336c00f1f3e4937410a9be9537553702be /src/southbridge
parentacf443191bd035c26ee89c3ca56f065a5111901b (diff)
Remove assembly coded log2 function
As we move to supporting other systems we need to get rid of assembly where we can. The log2 function in src/lib is identical to the assembly one (tested for all 32-bit signed integers :-) and takes about 10 ns to run as opposed to 5ns for the non-portable assembly version. While speed is good, I think we can spare the 15 ns or so we add to boot time by using the C version only. Change-Id: Icafa565eae282c85fa5fc01b3bd1f110cd9aaa91 Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Reviewed-on: http://review.coreboot.org/1928 Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/southbridge')
-rw-r--r--src/southbridge/amd/agesa/hudson/lpc.c1
-rw-r--r--src/southbridge/amd/agesa/hudson/sm.c1
-rw-r--r--src/southbridge/amd/amd8111/acpi.c2
-rw-r--r--src/southbridge/amd/cimx/sb700/lpc.c1
-rw-r--r--src/southbridge/amd/cimx/sb800/lpc.c1
-rw-r--r--src/southbridge/amd/cs5535/chipsetinit.c1
-rw-r--r--src/southbridge/amd/sb600/lpc.c1
-rw-r--r--src/southbridge/amd/sb600/sm.c1
-rw-r--r--src/southbridge/amd/sb700/lpc.c1
-rw-r--r--src/southbridge/amd/sb700/sm.c1
-rw-r--r--src/southbridge/amd/sb800/lpc.c1
-rw-r--r--src/southbridge/amd/sb800/sm.c1
-rw-r--r--src/southbridge/broadcom/bcm5785/lpc.c1
-rw-r--r--src/southbridge/broadcom/bcm5785/sb_pci_main.c1
-rw-r--r--src/southbridge/nvidia/ck804/lpc.c1
-rw-r--r--src/southbridge/nvidia/ck804/smbus.c1
-rw-r--r--src/southbridge/nvidia/mcp55/lpc.c1
-rw-r--r--src/southbridge/nvidia/mcp55/smbus.c1
-rw-r--r--src/southbridge/sis/sis966/lpc.c1
-rw-r--r--src/southbridge/sis/sis966/sis761.c1
-rw-r--r--src/southbridge/via/k8t890/dram.c2
21 files changed, 2 insertions, 21 deletions
diff --git a/src/southbridge/amd/agesa/hudson/lpc.c b/src/southbridge/amd/agesa/hudson/lpc.c
index 97f27d0387..b56fa382fb 100644
--- a/src/southbridge/amd/agesa/hudson/lpc.c
+++ b/src/southbridge/amd/agesa/hudson/lpc.c
@@ -25,7 +25,6 @@
#include <device/pci_ops.h>
#include <pc80/mc146818rtc.h>
#include <pc80/isa-dma.h>
-#include <bitops.h>
#include <arch/io.h>
#include "hudson.h"
diff --git a/src/southbridge/amd/agesa/hudson/sm.c b/src/southbridge/amd/agesa/hudson/sm.c
index 36742aa31c..292101c7f3 100644
--- a/src/southbridge/amd/agesa/hudson/sm.c
+++ b/src/southbridge/amd/agesa/hudson/sm.c
@@ -24,7 +24,6 @@
#include <device/pci_ops.h>
#include <device/smbus.h>
#include <pc80/mc146818rtc.h>
-#include <bitops.h>
#include <arch/io.h>
#include <cpu/x86/lapic.h>
#include <arch/ioapic.h>
diff --git a/src/southbridge/amd/amd8111/acpi.c b/src/southbridge/amd/amd8111/acpi.c
index df57a7e2af..b7348468f3 100644
--- a/src/southbridge/amd/amd8111/acpi.c
+++ b/src/southbridge/amd/amd8111/acpi.c
@@ -5,7 +5,7 @@
#include <device/pci_ops.h>
#include <device/smbus.h>
#include <pc80/mc146818rtc.h>
-#include <bitops.h>
+#include <lib.h>
#include <arch/io.h>
#include "amd8111.h"
#include "amd8111_smbus.h"
diff --git a/src/southbridge/amd/cimx/sb700/lpc.c b/src/southbridge/amd/cimx/sb700/lpc.c
index 7157a5590a..1ee1bbbac9 100644
--- a/src/southbridge/amd/cimx/sb700/lpc.c
+++ b/src/southbridge/amd/cimx/sb700/lpc.c
@@ -19,7 +19,6 @@
#include <device/pci.h>
#include "lpc.h"
-#include <bitops.h>
#include <arch/io.h>
#include <arch/ioapic.h>
#include <console/console.h> /* printk */
diff --git a/src/southbridge/amd/cimx/sb800/lpc.c b/src/southbridge/amd/cimx/sb800/lpc.c
index 59d74c0737..caac5b14d2 100644
--- a/src/southbridge/amd/cimx/sb800/lpc.c
+++ b/src/southbridge/amd/cimx/sb800/lpc.c
@@ -21,7 +21,6 @@
#include <device/pci.h>
#include <arch/ioapic.h>
#include "lpc.h"
-#include <bitops.h>
#include <arch/io.h>
#include <cbmem.h>
diff --git a/src/southbridge/amd/cs5535/chipsetinit.c b/src/southbridge/amd/cs5535/chipsetinit.c
index 2fceefa5eb..7e6ff3abb7 100644
--- a/src/southbridge/amd/cs5535/chipsetinit.c
+++ b/src/southbridge/amd/cs5535/chipsetinit.c
@@ -6,7 +6,6 @@
#include <device/pci_ids.h>
#include <stdlib.h>
#include <string.h>
-#include <bitops.h>
#include "chip.h"
#include "northbridge/amd/gx2/northbridge.h"
#include <cpu/amd/gx2def.h>
diff --git a/src/southbridge/amd/sb600/lpc.c b/src/southbridge/amd/sb600/lpc.c
index 22945a7e8e..7177e4f9fc 100644
--- a/src/southbridge/amd/sb600/lpc.c
+++ b/src/southbridge/amd/sb600/lpc.c
@@ -25,7 +25,6 @@
#include <device/pci_ops.h>
#include <pc80/mc146818rtc.h>
#include <pc80/isa-dma.h>
-#include <bitops.h>
#include <arch/io.h>
#include <arch/ioapic.h>
#include "sb600.h"
diff --git a/src/southbridge/amd/sb600/sm.c b/src/southbridge/amd/sb600/sm.c
index 8c1dc9029b..8f25549feb 100644
--- a/src/southbridge/amd/sb600/sm.c
+++ b/src/southbridge/amd/sb600/sm.c
@@ -24,7 +24,6 @@
#include <device/pci_ops.h>
#include <device/smbus.h>
#include <pc80/mc146818rtc.h>
-#include <bitops.h>
#include <arch/io.h>
#include <cpu/x86/lapic.h>
#include <arch/ioapic.h>
diff --git a/src/southbridge/amd/sb700/lpc.c b/src/southbridge/amd/sb700/lpc.c
index be940e3d2f..415b786d37 100644
--- a/src/southbridge/amd/sb700/lpc.c
+++ b/src/southbridge/amd/sb700/lpc.c
@@ -25,7 +25,6 @@
#include <device/pci_ops.h>
#include <pc80/mc146818rtc.h>
#include <pc80/isa-dma.h>
-#include <bitops.h>
#include <arch/io.h>
#include <arch/ioapic.h>
#include <cbmem.h>
diff --git a/src/southbridge/amd/sb700/sm.c b/src/southbridge/amd/sb700/sm.c
index 05065b6dbe..bd48334a09 100644
--- a/src/southbridge/amd/sb700/sm.c
+++ b/src/southbridge/amd/sb700/sm.c
@@ -24,7 +24,6 @@
#include <device/pci_ops.h>
#include <device/smbus.h>
#include <pc80/mc146818rtc.h>
-#include <bitops.h>
#include <arch/io.h>
#include <cpu/x86/lapic.h>
#include <arch/ioapic.h>
diff --git a/src/southbridge/amd/sb800/lpc.c b/src/southbridge/amd/sb800/lpc.c
index 3cb0789939..97f0f8404c 100644
--- a/src/southbridge/amd/sb800/lpc.c
+++ b/src/southbridge/amd/sb800/lpc.c
@@ -25,7 +25,6 @@
#include <device/pci_ops.h>
#include <pc80/mc146818rtc.h>
#include <pc80/isa-dma.h>
-#include <bitops.h>
#include <arch/io.h>
#include "sb800.h"
diff --git a/src/southbridge/amd/sb800/sm.c b/src/southbridge/amd/sb800/sm.c
index 50a8f0bca7..7a95feba6a 100644
--- a/src/southbridge/amd/sb800/sm.c
+++ b/src/southbridge/amd/sb800/sm.c
@@ -24,7 +24,6 @@
#include <device/pci_ops.h>
#include <device/smbus.h>
#include <pc80/mc146818rtc.h>
-#include <bitops.h>
#include <arch/io.h>
#include <cpu/x86/lapic.h>
#include <arch/ioapic.h>
diff --git a/src/southbridge/broadcom/bcm5785/lpc.c b/src/southbridge/broadcom/bcm5785/lpc.c
index adf546245f..9956f49987 100644
--- a/src/southbridge/broadcom/bcm5785/lpc.c
+++ b/src/southbridge/broadcom/bcm5785/lpc.c
@@ -26,7 +26,6 @@
#include <device/pci_ops.h>
#include <pc80/mc146818rtc.h>
#include <pc80/isa-dma.h>
-#include <bitops.h>
#include <arch/io.h>
#include <arch/ioapic.h>
#include "bcm5785.h"
diff --git a/src/southbridge/broadcom/bcm5785/sb_pci_main.c b/src/southbridge/broadcom/bcm5785/sb_pci_main.c
index fe809c4974..955d3c7877 100644
--- a/src/southbridge/broadcom/bcm5785/sb_pci_main.c
+++ b/src/southbridge/broadcom/bcm5785/sb_pci_main.c
@@ -26,7 +26,6 @@
#include <device/pci_ops.h>
#include <pc80/mc146818rtc.h>
#include <pc80/isa-dma.h>
-#include <bitops.h>
#include <arch/io.h>
#include <device/smbus.h>
#include "bcm5785.h"
diff --git a/src/southbridge/nvidia/ck804/lpc.c b/src/southbridge/nvidia/ck804/lpc.c
index d37188265f..6ccea6a354 100644
--- a/src/southbridge/nvidia/ck804/lpc.c
+++ b/src/southbridge/nvidia/ck804/lpc.c
@@ -28,7 +28,6 @@
#include <device/pci_ops.h>
#include <pc80/mc146818rtc.h>
#include <pc80/isa-dma.h>
-#include <bitops.h>
#include <arch/io.h>
#include <arch/ioapic.h>
#include <cpu/x86/lapic.h>
diff --git a/src/southbridge/nvidia/ck804/smbus.c b/src/southbridge/nvidia/ck804/smbus.c
index 011faf8fb4..269340eb91 100644
--- a/src/southbridge/nvidia/ck804/smbus.c
+++ b/src/southbridge/nvidia/ck804/smbus.c
@@ -24,7 +24,6 @@
#include <device/pci_ids.h>
#include <device/pci_ops.h>
#include <device/smbus.h>
-#include <bitops.h>
#include <arch/io.h>
#include "ck804.h"
#include "smbus.h"
diff --git a/src/southbridge/nvidia/mcp55/lpc.c b/src/southbridge/nvidia/mcp55/lpc.c
index d16e3cc509..1e2155ae73 100644
--- a/src/southbridge/nvidia/mcp55/lpc.c
+++ b/src/southbridge/nvidia/mcp55/lpc.c
@@ -31,7 +31,6 @@
#include <device/pci_ops.h>
#include <pc80/mc146818rtc.h>
#include <pc80/isa-dma.h>
-#include <bitops.h>
#include <arch/io.h>
#include <arch/ioapic.h>
#include <cpu/x86/lapic.h>
diff --git a/src/southbridge/nvidia/mcp55/smbus.c b/src/southbridge/nvidia/mcp55/smbus.c
index a945f237d0..694918630b 100644
--- a/src/southbridge/nvidia/mcp55/smbus.c
+++ b/src/southbridge/nvidia/mcp55/smbus.c
@@ -27,7 +27,6 @@
#include <device/pci_ids.h>
#include <device/pci_ops.h>
#include <device/smbus.h>
-#include <bitops.h>
#include <arch/io.h>
#include "mcp55.h"
#include "smbus.h"
diff --git a/src/southbridge/sis/sis966/lpc.c b/src/southbridge/sis/sis966/lpc.c
index 26f60dd3af..9714085959 100644
--- a/src/southbridge/sis/sis966/lpc.c
+++ b/src/southbridge/sis/sis966/lpc.c
@@ -33,7 +33,6 @@
#include <device/pci_ops.h>
#include <pc80/mc146818rtc.h>
#include <pc80/isa-dma.h>
-#include <bitops.h>
#include <arch/io.h>
#include <arch/ioapic.h>
#include <cpu/x86/lapic.h>
diff --git a/src/southbridge/sis/sis966/sis761.c b/src/southbridge/sis/sis966/sis761.c
index 3d7bc470d3..9dd16e8764 100644
--- a/src/southbridge/sis/sis966/sis761.c
+++ b/src/southbridge/sis/sis966/sis761.c
@@ -37,7 +37,6 @@
#include <device/pci_ids.h>
#include <device/pci_ops.h>
#include <pc80/mc146818rtc.h>
-#include <bitops.h>
#include <cpu/amd/model_fxx_rev.h>
#include <arch/io.h>
diff --git a/src/southbridge/via/k8t890/dram.c b/src/southbridge/via/k8t890/dram.c
index 11c84812b7..088b3d2676 100644
--- a/src/southbridge/via/k8t890/dram.c
+++ b/src/southbridge/via/k8t890/dram.c
@@ -25,7 +25,7 @@
#include <cpu/x86/msr.h>
#include <cpu/amd/mtrr.h>
#include <pc80/mc146818rtc.h>
-#include <bitops.h>
+#include <lib.h>
#include "k8x8xx.h"
static void dram_enable(struct device *dev)