diff options
author | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2011-09-20 22:36:32 +0200 |
---|---|---|
committer | Peter Stuge <peter@stuge.se> | 2011-09-21 00:31:45 +0200 |
commit | 03f82bd787833db4c341a129a3329ea0aead6235 (patch) | |
tree | 820752b775cc2e980738f4dceb5835b03bf70fc9 /src/southbridge | |
parent | 8487229b91560935b5c829f47a7a44a0d91b2ea1 (diff) |
Use ACPI text fields consistently with all other boards
LXBIOS and LXB-DSDT are not used in other parts of the tree.
Make names consistent across the tree.
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Change-Id: I91caeac09fd2401a36e53bd061d249b236a48e43
Reviewed-on: http://review.coreboot.org/224
Tested-by: build bot (Jenkins)
Reviewed-by: Peter Stuge <peter@stuge.se>
Diffstat (limited to 'src/southbridge')
-rw-r--r-- | src/southbridge/intel/i82371eb/fadt.c | 6 | ||||
-rw-r--r-- | src/southbridge/nvidia/ck804/fadt.c | 6 | ||||
-rw-r--r-- | src/southbridge/nvidia/mcp55/fadt.c | 6 | ||||
-rw-r--r-- | src/southbridge/via/vt8237r/fadt.c | 6 |
4 files changed, 12 insertions, 12 deletions
diff --git a/src/southbridge/intel/i82371eb/fadt.c b/src/southbridge/intel/i82371eb/fadt.c index 5891440d2e..ea6baef340 100644 --- a/src/southbridge/intel/i82371eb/fadt.c +++ b/src/southbridge/intel/i82371eb/fadt.c @@ -45,9 +45,9 @@ void acpi_create_fadt(acpi_fadt_t *fadt, acpi_facs_t *facs, void *dsdt) memcpy(header->signature, "FACP", 4); header->length = 244; header->revision = 1; - memcpy(header->oem_id, "CORE ", 6); - memcpy(header->oem_table_id, "COREBOOT", 8); - memcpy(header->asl_compiler_id, "CORE", 4); + memcpy(header->oem_id, OEM_ID, 6); + memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8); + memcpy(header->asl_compiler_id, ASLC, 4); header->asl_compiler_revision = 42; fadt->firmware_ctrl = (u32)facs; diff --git a/src/southbridge/nvidia/ck804/fadt.c b/src/southbridge/nvidia/ck804/fadt.c index a315a32b96..3a0e926c1b 100644 --- a/src/southbridge/nvidia/ck804/fadt.c +++ b/src/southbridge/nvidia/ck804/fadt.c @@ -25,9 +25,9 @@ void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt) header->length = 0x74; header->revision = 1; #endif - memcpy(header->oem_id, "CORE ", 6); - memcpy(header->oem_table_id, "CB-FADT ", 8); - memcpy(header->asl_compiler_id, "IASL", 4); + memcpy(header->oem_id, OEM_ID, 6); + memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8); + memcpy(header->asl_compiler_id, ASLC, 4); header->asl_compiler_revision = 0; fadt->firmware_ctrl = (u32)facs; diff --git a/src/southbridge/nvidia/mcp55/fadt.c b/src/southbridge/nvidia/mcp55/fadt.c index 753a663239..e69172a326 100644 --- a/src/southbridge/nvidia/mcp55/fadt.c +++ b/src/southbridge/nvidia/mcp55/fadt.c @@ -44,9 +44,9 @@ void acpi_create_fadt(acpi_fadt_t *fadt, acpi_facs_t *facs, void *dsdt) memcpy(header->signature, "FACP", 4); header->length = sizeof(acpi_fadt_t); header->revision = 1; - memcpy(header->oem_id, "GBT", 6); - memcpy(header->oem_table_id, "COREBOOT ", 8); - memcpy(header->asl_compiler_id, "CORE", 4); + memcpy(header->oem_id, OEM_ID, 6); + memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8); + memcpy(header->asl_compiler_id, ASLC, 4); header->asl_compiler_revision = 42; printk(BIOS_INFO, "ACPI: pm_base: %u...\n", pm_base); diff --git a/src/southbridge/via/vt8237r/fadt.c b/src/southbridge/via/vt8237r/fadt.c index 6976f4d447..dcb6689a5f 100644 --- a/src/southbridge/via/vt8237r/fadt.c +++ b/src/southbridge/via/vt8237r/fadt.c @@ -46,9 +46,9 @@ void acpi_create_fadt(acpi_fadt_t *fadt, acpi_facs_t *facs, void *dsdt) memcpy(header->signature, "FACP", 4); header->length = 244; header->revision = 4; - memcpy(header->oem_id, "COREBO", 6); - memcpy(header->oem_table_id, "COREBOOT", 8); - memcpy(header->asl_compiler_id, "CORE", 4); + memcpy(header->oem_id, OEM_ID, 6); + memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8); + memcpy(header->asl_compiler_id, ASLC, 4); header->asl_compiler_revision = 42; fadt->firmware_ctrl = (u32)facs; |