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author | Subrata Banik <subratabanik@google.com> | 2022-01-31 17:53:17 +0530 |
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committer | Subrata Banik <subratabanik@google.com> | 2022-02-02 07:02:59 +0000 |
commit | fedc5427fde2d8fa17ebcf168cd90bc33467f07f (patch) | |
tree | 8e4b7e98244da45a5565fc97a76ece1f4070a35d /src/southbridge | |
parent | a0dd454115ad61821b171c400b2b5472f2f5b861 (diff) |
mb/google/brya: Lock FPMCU pins in brask and brya baseboards
This applies a configuration lock to the FPMCU SPI and IRQ GPIOs
for all brya and brask variants.
BUG=b:208827718
TEST=cat /sys/kernel/debug/pinctrl/INTC1055\:00/pins suggests `FPMCU_*`
(F11-F13 and F15-F16) are locked.
Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: I1d0b8a5aed6ea54bcfaa267cae5ca78595396ce5
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61502
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com>
Diffstat (limited to 'src/southbridge')
0 files changed, 0 insertions, 0 deletions