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authorKyösti Mälkki <kyosti.malkki@gmail.com>2023-04-09 10:01:58 +0300
committerKyösti Mälkki <kyosti.malkki@gmail.com>2023-04-13 18:48:29 +0000
commitd1534e41e4172b121122b2802d45028b61234279 (patch)
treeb1312eaf4918a1275f638211e8a6d3f4d8cf7946 /src/southbridge
parent8f86fa0da17a7f5ec981fdf09ebb2c6a3c17b2f6 (diff)
AMD binaryPI: Use madt_ioapic_from_hw()
Read IOAPIC ID and number of interrupts from programmed registers. Change-Id: Ic8ba395bc220fdb691118719f7b32dd7400931f4 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/55570 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/southbridge')
-rw-r--r--src/southbridge/amd/pi/hudson/ioapic.h10
-rw-r--r--src/southbridge/amd/pi/hudson/sm.c3
2 files changed, 1 insertions, 12 deletions
diff --git a/src/southbridge/amd/pi/hudson/ioapic.h b/src/southbridge/amd/pi/hudson/ioapic.h
deleted file mode 100644
index 757e5c83d5..0000000000
--- a/src/southbridge/amd/pi/hudson/ioapic.h
+++ /dev/null
@@ -1,10 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-#ifndef AMD_BLOCK_IOAPIC_H
-#define AMD_BLOCK_IOAPIC_H
-
-/* Since the old APIC bus isn't used any more, the IOAPIC IDs could be < CONFIG_MAX_CPUS */
-#define FCH_IOAPIC_ID (CONFIG_MAX_CPUS)
-#define GNB_IOAPIC_ID (CONFIG_MAX_CPUS + 1)
-
-#endif /* AMD_BLOCK_IOAPIC_H */
diff --git a/src/southbridge/amd/pi/hudson/sm.c b/src/southbridge/amd/pi/hudson/sm.c
index c40bf5e1c9..2dc2ae3924 100644
--- a/src/southbridge/amd/pi/hudson/sm.c
+++ b/src/southbridge/amd/pi/hudson/sm.c
@@ -5,7 +5,6 @@
#include <device/pci_ids.h>
#include <device/smbus.h>
#include <arch/ioapic.h>
-#include <southbridge/amd/pi/hudson/ioapic.h>
#include "hudson.h"
#include "smbus.c"
@@ -22,7 +21,7 @@
static void sm_init(struct device *dev)
{
- setup_ioapic(VIO_APIC_VADDR, FCH_IOAPIC_ID);
+ register_new_ioapic_gsi0(VIO_APIC_VADDR);
}
static int lsmbus_recv_byte(struct device *dev)