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author | Mike Loptien <mike.loptien@se-eng.com> | 2014-06-16 10:46:56 -0600 |
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committer | Mike Loptien <mike.loptien@se-eng.com> | 2014-06-24 00:30:12 +0200 |
commit | bd4553bb4c594ff5098fc7c4c85133aab163705e (patch) | |
tree | fdad03b9672e7dd0c0cefc8fab6ba513e8c2a3df /src/southbridge | |
parent | e96f4b1122fea74b8f9933fcefa1a2d5a616b39f (diff) |
MP Table: Change types to be consistent with the spec
Update the elements in the MP Spec structures with
appropriate types to more accurately reflect the
real sizes of the bit fields in the MP Tables.
Also add a function for PCI I/O interrupts since these are
handled slightly differently than the other I/O interrupt
entries. The src_bus_irq field is defined where
Bits 1-0: PIRQ pin: INT_A# = 0, INT_B# = 1, INT_C# = 2, INT_D# = 3
Bits 2-6: Originating PCI Device Number
Bit 7: Reserved
Change-Id: I693407beaa0ee454f49464e43ed45d8cba3b18fc
Signed-off-by: Mike Loptien <mike.loptien@se-eng.com>
Reviewed-on: http://review.coreboot.org/6050
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'src/southbridge')
0 files changed, 0 insertions, 0 deletions