Remove PCI_ROM_RUN option

The main purpose of option rom is to supply int* handlers.
But supplying those is outside of coreboot scope and if someone needs those
they should run SeaBIOS anyway which runs the option roms wonderfully.

Running VGA oprom is kept because they're needed to init graphics.

This patch still keeps the options to include the option roms to make them
available to SeaBIOS.

Change-Id: I646334cf88094d3bf8f527779a68a07e0b4b93ec
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/4545
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-by: Kevin O'Connor <kevin@koconnor.net>

9 files changed, 1 insertions, 40 deletions

diff --git a/src/southbridge/amd/sb600/ide.c b/src/southbridge/amd/sb600/ide.c
index 27001243a8..443ca74781 100644
--- a/src/southbridge/amd/sb600/ide.c
+++ b/src/southbridge/amd/sb600/ide.c
@@ -44,11 +44,6 @@ static void ide_init(struct device *dev)
 	dword = pci_read_config16(dev, 0x4);
 	dword |= 1 << 2;
 	pci_write_config16(dev, 0x4, dword);
-
-#if CONFIG_PCI_ROM_RUN
-	pci_dev_init(dev);
-#endif
-
 }
 
 static struct pci_operations lops_pci = {
diff --git a/src/southbridge/amd/sb700/ide.c b/src/southbridge/amd/sb700/ide.c
index b2378ced31..982c9294a3 100644
--- a/src/southbridge/amd/sb700/ide.c
+++ b/src/southbridge/amd/sb700/ide.c
@@ -59,10 +59,6 @@ static void ide_init(struct device *dev)
 		byte |= 1 << 4;
 		pci_write_config8(sm_dev, 0xAD, byte);
 	}
-
-#if CONFIG_PCI_ROM_RUN
-	pci_dev_init(dev);
-#endif
 }
 
 static struct pci_operations lops_pci = {
diff --git a/src/southbridge/amd/sb800/ide.c b/src/southbridge/amd/sb800/ide.c
index 69dfea4f1e..e54cf5d12a 100644
--- a/src/southbridge/amd/sb800/ide.c
+++ b/src/southbridge/amd/sb800/ide.c
@@ -57,10 +57,6 @@ static void ide_init(struct device *dev)
 		byte |= 1 << 4;
 		pci_write_config8(dev, 0xAD, byte);
 	}
-
-#if CONFIG_PCI_ROM_RUN
-	pci_dev_init(dev);
-#endif
 }
 
 static struct pci_operations lops_pci = {
diff --git a/src/southbridge/broadcom/bcm5780/nic.c b/src/southbridge/broadcom/bcm5780/nic.c
index df42dd36ec..df59fdcf1c 100644
--- a/src/southbridge/broadcom/bcm5780/nic.c
+++ b/src/southbridge/broadcom/bcm5780/nic.c
@@ -24,13 +24,6 @@
 #include <device/pci_ids.h>
 #include <device/pci_ops.h>
 
-static void nic_init(struct device *dev)
-{
-#if CONFIG_PCI_ROM_RUN
-	pci_dev_init(dev);// it will init option rom
-#endif
-
-}
 
 static void lpci_set_subsystem(device_t dev, unsigned vendor, unsigned device)
 {
@@ -46,7 +39,7 @@ static struct device_operations nic_ops  = {
 	.read_resources   = pci_dev_read_resources,
 	.set_resources    = pci_dev_set_resources,
 	.enable_resources = pci_dev_enable_resources,
-	.init             = nic_init,
+	.init             = pci_dev_init,
 	.scan_bus         = 0,
 	.ops_pci          = &lops_pci,
 };
diff --git a/src/southbridge/nvidia/ck804/ide.c b/src/southbridge/nvidia/ck804/ide.c
index 1750a2aff5..5b0ba51312 100644
--- a/src/southbridge/nvidia/ck804/ide.c
+++ b/src/southbridge/nvidia/ck804/ide.c
@@ -59,10 +59,6 @@ static void ide_init(struct device *dev)
 	dword = pci_read_config32(dev, 0xf8);
 	dword |= 12;
 	pci_write_config32(dev, 0xf8, dword);
-
-#if CONFIG_PCI_ROM_RUN
-	pci_dev_init(dev);
-#endif
 }
 
 static struct device_operations ide_ops = {
diff --git a/src/southbridge/nvidia/ck804/nic.c b/src/southbridge/nvidia/ck804/nic.c
index 3dccb8ea7d..e285644bec 100644
--- a/src/southbridge/nvidia/ck804/nic.c
+++ b/src/southbridge/nvidia/ck804/nic.c
@@ -107,10 +107,6 @@ static void nic_init(struct device *dev)
 #endif
 
 	nic_index++;
-
-#if CONFIG_PCI_ROM_RUN
-	pci_dev_init(dev);	/* It will init Option ROM. */
-#endif
 }
 
 static struct device_operations nic_ops = {
diff --git a/src/southbridge/nvidia/mcp55/ide.c b/src/southbridge/nvidia/mcp55/ide.c
index 23d4db1c28..5f8152bbe5 100644
--- a/src/southbridge/nvidia/mcp55/ide.c
+++ b/src/southbridge/nvidia/mcp55/ide.c
@@ -61,9 +61,6 @@ static void ide_init(struct device *dev)
 	dword = pci_read_config32(dev, 0xf8);
 	dword |= 12;
 	pci_write_config32(dev, 0xf8, dword);
-#if CONFIG_PCI_ROM_RUN
-	pci_dev_init(dev);
-#endif
 }
 
 static struct device_operations ide_ops = {
diff --git a/src/southbridge/nvidia/mcp55/nic.c b/src/southbridge/nvidia/mcp55/nic.c
index 86468fd64e..fd736e6a0c 100644
--- a/src/southbridge/nvidia/mcp55/nic.c
+++ b/src/southbridge/nvidia/mcp55/nic.c
@@ -179,11 +179,6 @@ static void nic_init(struct device *dev)
 #endif
 
 	nic_index++;
-
-#if CONFIG_PCI_ROM_RUN
-	pci_dev_init(dev);// it will init option rom
-#endif
-
 }
 
 static struct device_operations nic_ops  = {
diff --git a/src/southbridge/sis/sis966/ide.c b/src/southbridge/sis/sis966/ide.c
index fee720963a..6e8bd545c1 100644
--- a/src/southbridge/sis/sis966/ide.c
+++ b/src/southbridge/sis/sis966/ide.c
@@ -144,9 +144,6 @@ print_debug("IDE_INIT:---------->\n");
 	dword = pci_read_config32(dev, 0xf8);
 	dword |= 12;
 	pci_write_config32(dev, 0xf8, dword);
-#if CONFIG_PCI_ROM_RUN
-	pci_dev_init(dev);
-#endif
 
 #if DEBUG_IDE
 {