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authorAaron Durbin <adurbin@chromium.org>2017-09-15 11:01:17 -0600
committerAaron Durbin <adurbin@chromium.org>2017-09-20 23:53:23 +0000
commit9fde0d780dd0abd24119ff6f7854b4b5939ce7d2 (patch)
tree2a42e542b93e2dc73712182a634a9483f512cc1a /src/southbridge
parentaa51cd5c12596b0b6d5f61eb1108091bf3a4fd3f (diff)
vboot: remove init_vbnv_cmos()
Instead of having each potential caller deal with the differences of cmos_init() and init_vbnv_cmos() when VBOOT is enabled put the correct logic within the callee, cmos_init(), for handling the vbnv in CMOS. The internal __cmos_init() routine returns when the CMOS area was cleared. BUG=b:63054105 Change-Id: Ia124bcd61d3ac03e899a4ecf3645fc4b7a558f03 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/21549 Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge')
-rw-r--r--src/southbridge/amd/pi/hudson/lpc.c6
1 files changed, 1 insertions, 5 deletions
diff --git a/src/southbridge/amd/pi/hudson/lpc.c b/src/southbridge/amd/pi/hudson/lpc.c
index 282f17c1f1..da51cd042d 100644
--- a/src/southbridge/amd/pi/hudson/lpc.c
+++ b/src/southbridge/amd/pi/hudson/lpc.c
@@ -29,7 +29,6 @@
#include <pc80/i8254.h>
#include <pc80/i8259.h>
#include "hudson.h"
-#include <vboot/vbnv.h>
#include "pci_devs.h"
static void lpc_init(device_t dev)
@@ -78,10 +77,7 @@ static void lpc_init(device_t dev)
* update CMOS unless it is invalid.
* 1 tells cmos_init to always initialize the CMOS.
*/
- if (IS_ENABLED(CONFIG_VBOOT_VBNV_CMOS))
- init_vbnv_cmos(0);
- else
- cmos_init(0);
+ cmos_init(0);
/* Initialize i8259 pic */
setup_i8259 ();