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| author | Bora Guvendik <bora.guvendik@intel.com> | 2021-03-01 14:32:16 -0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2021-03-15 06:29:56 +0000 |
| commit | 9d4d2d014c91e041cf7fb8ea593364c6644dd644 (patch) | |
| tree | 7aeb0a44ac8d449248d70666d620d16117272254 /src/southbridge | |
| parent | 011e1b3fbc4d31feaa19ef34d3093f2d289357eb (diff) | |
mb/intel/tglrvp: Enable RTD3 for WWAN
Enable the PCIe RTD3 driver for WWAN device attached to PCIe Root
Port 4 and provide the reset GPIO / src clk pin.
BUG=none
TEST=Boot to OS, verify the link is in L2 state during S0ix.
Change-Id: I669e02bd02e3af878648a6f3cf4fbb4d06c9857f
Signed-off-by: Bora Guvendik <bora.guvendik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51315
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Lance Zhao
Reviewed-by: Wonkyu Kim <wonkyu.kim@intel.com>
Diffstat (limited to 'src/southbridge')
0 files changed, 0 insertions, 0 deletions