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authorAlexander Goncharov <chat@joursoir.net>2023-02-04 15:20:37 +0400
committerElyes Haouas <ehaouas@noos.fr>2023-02-07 04:37:31 +0000
commit893c3ae892961facc9be8bd300160222e694ab34 (patch)
treeec628a8f9371fe96b783c7bf11dee59d065c0df5 /src/southbridge
parentdb4b71ff10b48624a1a0b76e3255bd206ef921d5 (diff)
tree: Drop repeated words
Found-by: linter Change-Id: I7c6d0887a45fdb4b6de294770a7fdd5545a9479b Signed-off-by: Alexander Goncharov <chat@joursoir.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/72795 Reviewed-by: Nicholas Chin <nic.c3.14@gmail.com> Reviewed-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Reviewed-by: Erik van den Bogaert <ebogaert@eltan.com> Reviewed-by: Frans Hendriks <fhendriks@eltan.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge')
-rw-r--r--src/southbridge/amd/pi/hudson/lpc.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/southbridge/amd/pi/hudson/lpc.c b/src/southbridge/amd/pi/hudson/lpc.c
index 7abb5bf379..0a4e038385 100644
--- a/src/southbridge/amd/pi/hudson/lpc.c
+++ b/src/southbridge/amd/pi/hudson/lpc.c
@@ -47,8 +47,8 @@ static void lpc_init(struct device *dev)
/* Disable LPC MSI Capability */
byte = pci_read_config8(dev, 0x78);
byte &= ~(1 << 1);
- byte &= ~(1 << 0); /* Keep the old way. i.e., when bus master/DMA cycle is going
- on on LPC, it holds PCI grant, so no LPC slave cycle can
+ byte &= ~(1 << 0); /* Keep the old way. i.e., when bus master/DMA cycle is running
+ on LPC, it holds PCI grant, so no LPC slave cycle can
interrupt and visit LPC. */
pci_write_config8(dev, 0x78, byte);