diff options
| author | Elyes HAOUAS <ehaouas@noos.fr> | 2018-10-05 10:36:45 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-10-08 09:46:16 +0000 |
| commit | 88607a4b1002ed6acc7f316f274feea2fd861095 (patch) | |
| tree | e004c85f36109da78872b88875d4f0ea1c30aaff /src/southbridge | |
| parent | d9169f826a3c19a7380a7d73c7126e52eb62e77d (diff) | |
src: Use tabs for indentation
Change-Id: I6b40aaf5af5d114bbb0cd227dfd50b0ee19eebba
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/28934
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge')
| -rw-r--r-- | src/southbridge/intel/bd82x6x/acpi/platform.asl | 4 | ||||
| -rw-r--r-- | src/southbridge/intel/bd82x6x/acpi/usb.asl | 4 | ||||
| -rw-r--r-- | src/southbridge/intel/lynxpoint/early_pch.c | 2 |
3 files changed, 5 insertions, 5 deletions
diff --git a/src/southbridge/intel/bd82x6x/acpi/platform.asl b/src/southbridge/intel/bd82x6x/acpi/platform.asl index 0a01e0fb4c..e37066887b 100644 --- a/src/southbridge/intel/bd82x6x/acpi/platform.asl +++ b/src/southbridge/intel/bd82x6x/acpi/platform.asl @@ -48,6 +48,6 @@ Method(TRAP, 1, Serialized) Method(_PIC, 1) { - // Remember the OS' IRQ routing choice. - Store(Arg0, PICM) + // Remember the OS' IRQ routing choice. + Store(Arg0, PICM) } diff --git a/src/southbridge/intel/bd82x6x/acpi/usb.asl b/src/southbridge/intel/bd82x6x/acpi/usb.asl index c5bc48d73d..1d79aacfec 100644 --- a/src/southbridge/intel/bd82x6x/acpi/usb.asl +++ b/src/southbridge/intel/bd82x6x/acpi/usb.asl @@ -59,7 +59,7 @@ Device (EHC1) Store (Arg0, VISI) Return (PCKG) - } + } // How many are there? Device (PRT1) { Name (_ADR, 1) } // USB Port 0 @@ -112,7 +112,7 @@ Device (EHC2) Store (Arg0, VISI) Return (PCKG) - } + } // How many are there? Device (PRT1) { Name (_ADR, 1) } // USB Port 0 diff --git a/src/southbridge/intel/lynxpoint/early_pch.c b/src/southbridge/intel/lynxpoint/early_pch.c index 4c45613487..8e11f10e9a 100644 --- a/src/southbridge/intel/lynxpoint/early_pch.c +++ b/src/southbridge/intel/lynxpoint/early_pch.c @@ -125,7 +125,7 @@ void pch_enable_lpc(void) } int early_pch_init(const void *gpio_map, - const struct rcba_config_instruction *rcba_config) + const struct rcba_config_instruction *rcba_config) { int wake_from_s3; |