diff options
author | Angel Pons <th3fanbus@gmail.com> | 2021-02-09 11:20:02 +0100 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2021-02-11 10:18:21 +0000 |
commit | 73c73dded667e612546042370e3fd1bfb4eaf4a3 (patch) | |
tree | 78ef6011c31e1f96f46124a9b3e0bfa4657cbc82 /src/southbridge | |
parent | c64465f2123c6e68a1b1a0210890d02826139579 (diff) |
sb/amd/agesa/hudson/sm.c: Drop unused `BITx` macros
Tested with BUILD_TIMELESS=1, Lenovo G505s remains identical.
Change-Id: I759bdef44f7ca0f35350901998f6820820005b38
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50423
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/southbridge')
-rw-r--r-- | src/southbridge/amd/agesa/hudson/sm.c | 35 |
1 files changed, 0 insertions, 35 deletions
diff --git a/src/southbridge/amd/agesa/hudson/sm.c b/src/southbridge/amd/agesa/hudson/sm.c index a6b146463f..6f9e03c2d3 100644 --- a/src/southbridge/amd/agesa/hudson/sm.c +++ b/src/southbridge/amd/agesa/hudson/sm.c @@ -14,41 +14,6 @@ #define MAINBOARD_POWER_OFF 0 #define MAINBOARD_POWER_ON 1 -#define BIT0 (1 << 0) -#define BIT1 (1 << 1) -#define BIT2 (1 << 2) -#define BIT3 (1 << 3) -#define BIT4 (1 << 4) -#define BIT5 (1 << 5) -#define BIT6 (1 << 6) -#define BIT7 (1 << 7) - -#define BIT8 (1 << 8) -#define BIT9 (1 << 9) -#define BIT10 (1 << 10) -#define BIT11 (1 << 11) -#define BIT12 (1 << 12) -#define BIT13 (1 << 13) -#define BIT14 (1 << 14) -#define BIT15 (1 << 15) - -#define BIT16 (1 << 16) -#define BIT17 (1 << 17) -#define BIT18 (1 << 18) -#define BIT19 (1 << 19) -#define BIT20 (1 << 20) -#define BIT21 (1 << 21) -#define BIT22 (1 << 22) -#define BIT23 (1 << 23) -#define BIT24 (1 << 24) -#define BIT25 (1 << 25) -#define BIT26 (1 << 26) -#define BIT27 (1 << 27) -#define BIT28 (1 << 28) -#define BIT29 (1 << 29) -#define BIT30 (1 << 30) -#define BIT31 (1 << 31) - /* * HUDSON enables all USB controllers by default in SMBUS Control. * HUDSON enables SATA by default in SMBUS Control. |