diff options
author | Uwe Hermann <uwe@hermann-uwe.de> | 2010-12-07 19:16:07 +0000 |
---|---|---|
committer | Uwe Hermann <uwe@hermann-uwe.de> | 2010-12-07 19:16:07 +0000 |
commit | 4028ce7b768c9b33e4b0b1af20eede9968359071 (patch) | |
tree | f01d319ad08b5611b2bdf95c7f426d5f993635d3 /src/southbridge | |
parent | 7f20d73eba22babbc5bf9efd8df8a3e9d3a117c7 (diff) |
Get rid of some unneeded function prototypes in romstage.c files.
Abuild-tested.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6147 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge')
-rw-r--r-- | src/southbridge/intel/i82371eb/i82371eb.h | 6 | ||||
-rw-r--r-- | src/southbridge/intel/i82371eb/i82371eb_early_pm.c | 2 | ||||
-rw-r--r-- | src/southbridge/intel/i82371eb/i82371eb_early_smbus.c | 2 | ||||
-rw-r--r-- | src/southbridge/intel/i82371eb/i82371eb_smbus.h | 2 | ||||
-rw-r--r-- | src/southbridge/intel/i82801ax/i82801ax.h | 7 | ||||
-rw-r--r-- | src/southbridge/intel/i82801ax/i82801ax_early_smbus.c | 2 | ||||
-rw-r--r-- | src/southbridge/intel/i82801ax/i82801ax_smbus.h | 2 | ||||
-rw-r--r-- | src/southbridge/intel/i82801bx/i82801bx.h | 5 | ||||
-rw-r--r-- | src/southbridge/intel/i82801bx/i82801bx_early_smbus.c | 2 | ||||
-rw-r--r-- | src/southbridge/intel/i82801bx/i82801bx_smbus.h | 2 | ||||
-rw-r--r-- | src/southbridge/intel/i82801gx/i82801gx.h | 5 | ||||
-rw-r--r-- | src/southbridge/intel/i82801gx/i82801gx_early_smbus.c | 2 | ||||
-rw-r--r-- | src/southbridge/intel/i82801gx/i82801gx_smbus.h | 3 |
13 files changed, 25 insertions, 17 deletions
diff --git a/src/southbridge/intel/i82371eb/i82371eb.h b/src/southbridge/intel/i82371eb/i82371eb.h index 2fcad8d6ee..709b8327a8 100644 --- a/src/southbridge/intel/i82371eb/i82371eb.h +++ b/src/southbridge/intel/i82371eb/i82371eb.h @@ -36,6 +36,12 @@ void i82371eb_hard_reset(void); #endif #endif +#if defined(__PRE_RAM__) && !defined(__ROMCC__) +void enable_smbus(void); +int smbus_read_byte(u8 device, u8 address); +void enable_pm(void); +#endif + /* If 'cond' is true this macro sets the bit(s) specified by 'bits' in the * 'reg' variable, otherwise it clears those bits. * diff --git a/src/southbridge/intel/i82371eb/i82371eb_early_pm.c b/src/southbridge/intel/i82371eb/i82371eb_early_pm.c index 66c2712b7b..5e52985428 100644 --- a/src/southbridge/intel/i82371eb/i82371eb_early_pm.c +++ b/src/southbridge/intel/i82371eb/i82371eb_early_pm.c @@ -26,8 +26,6 @@ #include <console/console.h> #include "i82371eb.h" -void enable_pm(void); - void enable_pm(void) { device_t dev; diff --git a/src/southbridge/intel/i82371eb/i82371eb_early_smbus.c b/src/southbridge/intel/i82371eb/i82371eb_early_smbus.c index b7c79075eb..8505762933 100644 --- a/src/southbridge/intel/i82371eb/i82371eb_early_smbus.c +++ b/src/southbridge/intel/i82371eb/i82371eb_early_smbus.c @@ -27,8 +27,6 @@ #include "i82371eb.h" #include "i82371eb_smbus.h" -int smbus_read_byte(u8 device, u8 address); - void enable_smbus(void) { device_t dev; diff --git a/src/southbridge/intel/i82371eb/i82371eb_smbus.h b/src/southbridge/intel/i82371eb/i82371eb_smbus.h index 54e7906223..f82f2edc73 100644 --- a/src/southbridge/intel/i82371eb/i82371eb_smbus.h +++ b/src/southbridge/intel/i82371eb/i82371eb_smbus.h @@ -1,4 +1,5 @@ #include <device/smbus_def.h> +#include "i82371eb.h" #define SMBHST_STATUS 0x0 #define SMBHST_CTL 0x2 @@ -10,7 +11,6 @@ #define SMBUS_STATUS_MASK 0x1e #define SMBUS_ERROR_FLAG (1<<2) -void enable_smbus(void); int do_smbus_read_byte(unsigned smbus_io_base, unsigned device, unsigned address); static inline void smbus_delay(void) diff --git a/src/southbridge/intel/i82801ax/i82801ax.h b/src/southbridge/intel/i82801ax/i82801ax.h index 585de6e3c4..bd192e019e 100644 --- a/src/southbridge/intel/i82801ax/i82801ax.h +++ b/src/southbridge/intel/i82801ax/i82801ax.h @@ -23,7 +23,12 @@ #if !defined(__PRE_RAM__) #include "chip.h" -extern void i82801ax_enable(device_t dev); +void i82801ax_enable(device_t dev); +#endif + +#if defined(__PRE_RAM__) && !defined(__ROMCC__) +void enable_smbus(void); +int smbus_read_byte(u8 device, u8 address); #endif #define SMBUS_IO_BASE 0x0f00 diff --git a/src/southbridge/intel/i82801ax/i82801ax_early_smbus.c b/src/southbridge/intel/i82801ax/i82801ax_early_smbus.c index d30ed57e07..dca3a28eec 100644 --- a/src/southbridge/intel/i82801ax/i82801ax_early_smbus.c +++ b/src/southbridge/intel/i82801ax/i82801ax_early_smbus.c @@ -28,8 +28,6 @@ #include "i82801ax.h" #include "i82801ax_smbus.h" -int smbus_read_byte(u8 device, u8 address); - void enable_smbus(void) { device_t dev; diff --git a/src/southbridge/intel/i82801ax/i82801ax_smbus.h b/src/southbridge/intel/i82801ax/i82801ax_smbus.h index bf7a479a49..26893a76d9 100644 --- a/src/southbridge/intel/i82801ax/i82801ax_smbus.h +++ b/src/southbridge/intel/i82801ax/i82801ax_smbus.h @@ -19,8 +19,8 @@ */ #include <device/smbus_def.h> +#include "i82801ax.h" -void enable_smbus(void); int do_smbus_read_byte(u16 smbus_io_base, u8 device, u8 address); static void smbus_delay(void) diff --git a/src/southbridge/intel/i82801bx/i82801bx.h b/src/southbridge/intel/i82801bx/i82801bx.h index eae6de6d86..090cddfbae 100644 --- a/src/southbridge/intel/i82801bx/i82801bx.h +++ b/src/southbridge/intel/i82801bx/i82801bx.h @@ -26,6 +26,11 @@ extern void i82801bx_enable(device_t dev); #endif +#if defined(__PRE_RAM__) && !defined(__ROMCC__) +void enable_smbus(void); +int smbus_read_byte(u8 device, u8 address); +#endif + #define SMBUS_IO_BASE 0x0f00 #define PMBASE_ADDR 0x0400 #define GPIO_BASE_ADDR 0x0500 diff --git a/src/southbridge/intel/i82801bx/i82801bx_early_smbus.c b/src/southbridge/intel/i82801bx/i82801bx_early_smbus.c index 92a5403edd..6a2097ea14 100644 --- a/src/southbridge/intel/i82801bx/i82801bx_early_smbus.c +++ b/src/southbridge/intel/i82801bx/i82801bx_early_smbus.c @@ -28,8 +28,6 @@ #include "i82801bx.h" #include "i82801bx_smbus.h" -int smbus_read_byte(u8 device, u8 address); - void enable_smbus(void) { device_t dev; diff --git a/src/southbridge/intel/i82801bx/i82801bx_smbus.h b/src/southbridge/intel/i82801bx/i82801bx_smbus.h index 066feade07..c04e9dc8d3 100644 --- a/src/southbridge/intel/i82801bx/i82801bx_smbus.h +++ b/src/southbridge/intel/i82801bx/i82801bx_smbus.h @@ -20,8 +20,6 @@ #include <device/smbus_def.h> -void enable_smbus(void); - static void smbus_delay(void) { inb(0x80); diff --git a/src/southbridge/intel/i82801gx/i82801gx.h b/src/southbridge/intel/i82801gx/i82801gx.h index f6a54e94d5..37bcf572b9 100644 --- a/src/southbridge/intel/i82801gx/i82801gx.h +++ b/src/southbridge/intel/i82801gx/i82801gx.h @@ -46,6 +46,11 @@ extern void i82801gx_enable(device_t dev); void i82801gx_enable_usbdebug(unsigned int port); #endif +#if defined(__PRE_RAM__) && !defined(__ROMCC__) && !defined(ASSEMBLY) +void enable_smbus(void); +int smbus_read_byte(unsigned device, unsigned address); +#endif + #define MAINBOARD_POWER_OFF 0 #define MAINBOARD_POWER_ON 1 #define MAINBOARD_POWER_KEEP 2 diff --git a/src/southbridge/intel/i82801gx/i82801gx_early_smbus.c b/src/southbridge/intel/i82801gx/i82801gx_early_smbus.c index 658b483165..0298cc94cd 100644 --- a/src/southbridge/intel/i82801gx/i82801gx_early_smbus.c +++ b/src/southbridge/intel/i82801gx/i82801gx_early_smbus.c @@ -26,8 +26,6 @@ #include "i82801gx.h" #include "i82801gx_smbus.h" -int smbus_read_byte(unsigned device, unsigned address); - void enable_smbus(void) { device_t dev; diff --git a/src/southbridge/intel/i82801gx/i82801gx_smbus.h b/src/southbridge/intel/i82801gx/i82801gx_smbus.h index d1aaf5b517..a03e4cd957 100644 --- a/src/southbridge/intel/i82801gx/i82801gx_smbus.h +++ b/src/southbridge/intel/i82801gx/i82801gx_smbus.h @@ -19,8 +19,7 @@ */ #include <device/smbus_def.h> - -void enable_smbus(void); +#include "i82801gx.h" static void smbus_delay(void) { |