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authorKyösti Mälkki <kyosti.malkki@gmail.com>2019-03-04 08:09:20 +0200
committerPatrick Georgi <pgeorgi@google.com>2019-03-14 11:32:06 +0000
commit3e41b9b22e9ef1b09586474bbe58026987c9fa65 (patch)
treef72cf00f647207a13fc6915e08a37b98e1daa415 /src/southbridge
parent4886cfc50a165ddfe10874611c580f604f172e48 (diff)
Remove leftover files
Change-Id: I7fa27a2cbc73b4acae41373a51f600f32b9002bf Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/31871 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/southbridge')
-rw-r--r--src/southbridge/intel/i82801dx/tco_timer.c31
1 files changed, 0 insertions, 31 deletions
diff --git a/src/southbridge/intel/i82801dx/tco_timer.c b/src/southbridge/intel/i82801dx/tco_timer.c
deleted file mode 100644
index e773fa47d7..0000000000
--- a/src/southbridge/intel/i82801dx/tco_timer.c
+++ /dev/null
@@ -1,31 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2008 Joseph Smith <joe@settoplinux.org>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; version 2 of
- * the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-static void i82801dx_halt_tco_timer(void)
-{
- /* Set the LPC device statically. */
- pci_devfn_t dev = PCI_DEV(0x0, 0x1f, 0x0);
-
- /* Temporarily set ACPI base address (I/O space). */
- pci_write_config32(dev, PMBASE, (PMBASE_ADDR | 1));
-
- /* Enable ACPI I/O. */
- pci_write_config8(dev, ACPI_CNTL, 0x10);
-
- /* Halt the TCO timer, preventing SMI and automatic reboot */
- outw(inw(PMBASE_ADDR + TCOBASE + TCO1_CNT) | (1 << 11),
- PMBASE_ADDR + TCOBASE + TCO1_CNT);
-}