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authorKyösti Mälkki <kyosti.malkki@gmail.com>2021-02-15 22:31:20 +0200
committerKyösti Mälkki <kyosti.malkki@gmail.com>2021-02-23 07:46:11 +0000
commit10de874e9f41028106c5b79831f36ba869620bce (patch)
tree5aa6e6ec67f74e40b854927f6f04381d4cee462f /src/southbridge
parent5e82d443aa730cce519ca119afdab3bb1de24a71 (diff)
sb/amd/common: Drop dummy variable assigment
Change-Id: I9b523bda2332859074d2e12c5cb70df68e18063d Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/50997 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/southbridge')
-rw-r--r--src/southbridge/amd/common/amd_pci_util.c5
1 files changed, 1 insertions, 4 deletions
diff --git a/src/southbridge/amd/common/amd_pci_util.c b/src/southbridge/amd/common/amd_pci_util.c
index 1c6d6be1ef..fe967d587b 100644
--- a/src/southbridge/amd/common/amd_pci_util.c
+++ b/src/southbridge/amd/common/amd_pci_util.c
@@ -86,7 +86,6 @@ void write_pci_cfg_irqs(void)
u16 int_line = 0; /* IRQ number read from PCI_INTR table and programmed to INT_LINE reg 0x3C */
u16 pci_intr_idx = 0; /* Index into PCI_INTR table, 0xC00/0xC01 */
u16 devfn = 0; /* A PCI Device and Function number */
- u8 bridged_device = 0; /* This device is on a PCI bridge */
u32 i = 0;
if (pirq_data_ptr == NULL) {
@@ -171,9 +170,7 @@ void write_pci_cfg_irqs(void)
*/
printk(BIOS_SPEW, "\tOrig INT_PIN\t: %d (%s)\n",
int_pin, pin_to_str(int_pin));
- if (bridged_device)
- printk(BIOS_SPEW, "\tSwizzled to\t: %d (%s)\n",
- target_pin, pin_to_str(target_pin));
+
printk(BIOS_SPEW, "\tPCI_INTR idx\t: 0x%02x (%s)\n"
"\tINT_LINE\t: 0x%X (IRQ %d)\n",
pci_intr_idx, intr_types[pci_intr_idx], int_line, int_line);