diff options
| author | Pratik Prajapati <pratikkumar.v.prajapati@intel.com> | 2015-12-07 17:08:07 -0800 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-02-09 19:45:06 +0100 |
| commit | 03be2383e7120ac2f1ea90a425e51df67015a8af (patch) | |
| tree | 33cc53f58d824b8efc1a86b58c72aaa206c1ce4c /src/southbridge | |
| parent | 4852dec1ab21e6c6e32eb85354ce4f4182537442 (diff) | |
intel/kunimitsu: Clean up GPIOs.
Some of the pins are not connected/used on kunimitsu board,
this patch will make them "Not connected".
Un-used PINS will controlled by GPIO controller (PMODE = GPIO) and
GPIO TX/RX will be disabled.
BRANCH=none
BUG=none
TEST=Build and booted in kunimitsu.
Change-Id: Iaf0d4806836648808fb91cfc7807c4c1595a5167
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: a7c25ad8ee0d189178124cff20569152b1053488
Original-Change-Id: I3add625b2bf01223cd389c6a5585827ac62dd0c0
Original-Signed-off-by: Pratik Prajapati <pratikkumar.v.prajapati@intel.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/316700
Original-Commit-Ready: Pratikkumar V Prajapati <pratikkumar.v.prajapati@intel.com>
Original-Tested-by: Pratikkumar V Prajapati <pratikkumar.v.prajapati@intel.com>
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-by: Pratikkumar V Prajapati <pratikkumar.v.prajapati@intel.com>
Reviewed-on: https://review.coreboot.org/13629
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/southbridge')
0 files changed, 0 insertions, 0 deletions