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| author | Lee Leahy <leroy.p.leahy@intel.com> | 2016-02-07 14:37:13 -0800 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-02-09 16:20:38 +0100 |
| commit | 87df8d08d676f79b894da84ebe6f8a57f69ba5b1 (patch) | |
| tree | c631ba642e44184808868342efd8055ec30731aa /src/southbridge | |
| parent | 5d7df71cfe6c5a4c8615f33d194cb34947f53c05 (diff) | |
soc/intel/quark: Enable Serial Port
Add the code to enable debug serial output using HSUART1:
* Enable the code using Kconfig value ENABLE_BUILTIN_HSUART1
* Note that the BIST value is always zero as validated in
esram_init.inc
* The initial TSC value is currently not saved!
Testing on Galileo:
* Edit the src/mainboard/intel/galileo/Makefile.inc file
* Add "select ADD_FSP_PDAT_FILE"
* Add "select ADD_FSP_RAW_BIN"
* Add "select ADD_RMU_FILE"
* Place the FSP.bin file in the location specified by CONFIG_FSP_FILE
* Place the pdat.bin files in the location specified by
CONFIG_FSP_PDAT_FILE
* Place the rmu.bin file in the location specified by CONFIG_RMU_FILE
* Testing is successful if serial output is present on HSUART1 at
115200 baud, 8-bit, no parity
Change-Id: I7e6181e8b9bc901c3ab236f0b56534850bb6bfd0
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: https://review.coreboot.org/13445
Tested-by: build bot (Jenkins)
Reviewed-by: FEI WANG <wangfei.jimei@gmail.com>
Diffstat (limited to 'src/southbridge')
0 files changed, 0 insertions, 0 deletions