diff options
| author | Martin Roth <martinroth@google.com> | 2016-07-28 16:50:48 -0600 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-07-31 18:19:33 +0200 |
| commit | 4c72d3612b194fe0c85575fc3445729650f77ecf (patch) | |
| tree | 748c8204aba6b511583001058ff68c03015364db /src/southbridge | |
| parent | 4b48ed8f387e846e647250b93e3915b06b123d45 (diff) | |
Remove extra newlines from the end of all coreboot files.
This removes the newlines from all files found by the new
int-015-final-newlines script.
Change-Id: I65b6d5b403fe3fa30b7ac11958cc0f9880704ed7
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/15975
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/southbridge')
| -rw-r--r-- | src/southbridge/amd/agesa/hudson/Makefile.inc | 1 | ||||
| -rw-r--r-- | src/southbridge/amd/pi/hudson/Kconfig | 2 | ||||
| -rw-r--r-- | src/southbridge/intel/fsp_i89xx/early_smbus.c | 1 | ||||
| -rw-r--r-- | src/southbridge/intel/fsp_i89xx/romstage.c | 1 | ||||
| -rw-r--r-- | src/southbridge/intel/fsp_i89xx/smbus.h | 1 |
5 files changed, 0 insertions, 6 deletions
diff --git a/src/southbridge/amd/agesa/hudson/Makefile.inc b/src/southbridge/amd/agesa/hudson/Makefile.inc index 77afc51b19..3877e606c2 100644 --- a/src/southbridge/amd/agesa/hudson/Makefile.inc +++ b/src/southbridge/amd/agesa/hudson/Makefile.inc @@ -68,4 +68,3 @@ cbfs-files-y += apu/amdfw apu/amdfw-file := $(obj)/amdfw.rom apu/amdfw-position := $(HUDSON_FWM_POSITION) apu/amdfw-type := raw - diff --git a/src/southbridge/amd/pi/hudson/Kconfig b/src/southbridge/amd/pi/hudson/Kconfig index 8fe3b2d897..5610e11bb8 100644 --- a/src/southbridge/amd/pi/hudson/Kconfig +++ b/src/southbridge/amd/pi/hudson/Kconfig @@ -242,5 +242,3 @@ config HUDSON_UART controller 0 registers range from FEDC_6000h to FEDC_6FFFh. UART controller 1 registers range from FEDC_8000h to FEDC_8FFFh. - - diff --git a/src/southbridge/intel/fsp_i89xx/early_smbus.c b/src/southbridge/intel/fsp_i89xx/early_smbus.c index ff381be2cb..0d41d5eaf2 100644 --- a/src/southbridge/intel/fsp_i89xx/early_smbus.c +++ b/src/southbridge/intel/fsp_i89xx/early_smbus.c @@ -56,4 +56,3 @@ int smbus_read_byte(unsigned device, unsigned address) { return do_smbus_read_byte(SMBUS_IO_BASE, device, address); } - diff --git a/src/southbridge/intel/fsp_i89xx/romstage.c b/src/southbridge/intel/fsp_i89xx/romstage.c index f20d73d567..c5c1136a43 100644 --- a/src/southbridge/intel/fsp_i89xx/romstage.c +++ b/src/southbridge/intel/fsp_i89xx/romstage.c @@ -219,4 +219,3 @@ uint64_t get_initial_timestamp(void) { return (uint64_t) pci_read_config32(PCI_DEV(0, 0x1f, 2), 0xd0) << 4; } - diff --git a/src/southbridge/intel/fsp_i89xx/smbus.h b/src/southbridge/intel/fsp_i89xx/smbus.h index db76bd49ca..92b05b78c2 100644 --- a/src/southbridge/intel/fsp_i89xx/smbus.h +++ b/src/southbridge/intel/fsp_i89xx/smbus.h @@ -89,4 +89,3 @@ static int do_smbus_read_byte(unsigned smbus_base, unsigned device, unsigned add } return byte; } - |