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authorStefan Reinauer <stefan.reinauer@coreboot.org>2011-02-15 00:23:05 +0000
committerStefan Reinauer <stepan@openbios.org>2011-02-15 00:23:05 +0000
commitdd6c1e67f6313e55191c1b4ed2746a21c340fa20 (patch)
treec0f0968d8eeed634ec2359e34096832bff1b6375 /src/southbridge
parentf58b63d6dc30e9400002fd0e791948a6be4384ef (diff)
SERIAL_POST was renamed to CONSOLE_POST a while ago
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6362 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge')
-rw-r--r--src/southbridge/amd/cimx_wrapper/sb800/bootblock.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/southbridge/amd/cimx_wrapper/sb800/bootblock.c b/src/southbridge/amd/cimx_wrapper/sb800/bootblock.c
index 5e66f8ba41..2136c348a6 100644
--- a/src/southbridge/amd/cimx_wrapper/sb800/bootblock.c
+++ b/src/southbridge/amd/cimx_wrapper/sb800/bootblock.c
@@ -22,7 +22,7 @@
#include <arch/romcc_io.h>
-#if CONFIG_SERIAL_POST == 1
+#if CONFIG_CONSOLE_POST == 1
/* Data */
#define UART_RBR 0x00
@@ -51,7 +51,7 @@
#define UART_LCS CONFIG_TTYS0_LCS
-#endif // CONFIG_SERIAL_POST == 1
+#endif // CONFIG_CONSOLE_POST == 1
static void sb800_enable_rom(void)