summaryrefslogtreecommitdiff
path: root/src/southbridge
diff options
context:
space:
mode:
authorDuncan Laurie <dlaurie@chromium.org>2013-03-07 14:00:43 -0800
committerRonald G. Minnich <rminnich@gmail.com>2013-03-21 23:04:31 +0100
commit7a3fd4de053e055ce6854e7ec42fb00da532d3d3 (patch)
tree1f84d2cd3eed0960a97d8ae1cacf2ffbf5ab8374 /src/southbridge
parent969ac8db18214cd56cf7d928cc3962554152a2de (diff)
lynxpoint: Enable EC IO ports 0x62/0x66
In order to be able to talk to an EC via standard path. Change-Id: I3fe76882dec9a0596cbc1c844afa2ddb03ed771c Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: http://review.coreboot.org/2810 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/southbridge')
-rw-r--r--src/southbridge/intel/lynxpoint/early_pch.c5
1 files changed, 3 insertions, 2 deletions
diff --git a/src/southbridge/intel/lynxpoint/early_pch.c b/src/southbridge/intel/lynxpoint/early_pch.c
index e7b62b4176..3709aed63b 100644
--- a/src/southbridge/intel/lynxpoint/early_pch.c
+++ b/src/southbridge/intel/lynxpoint/early_pch.c
@@ -90,8 +90,9 @@ static void pch_enable_lpc(void)
/* Set COM1/COM2 decode range */
pci_write_config16(dev, LPC_IO_DEC, 0x0010);
- /* Enable SuperIO + COM1 + PS/2 Keyboard/Mouse */
- u16 lpc_config = CNF1_LPC_EN | CNF2_LPC_EN | COMA_LPC_EN | KBC_LPC_EN;
+ /* Enable SuperIO + MC + COM1 + PS/2 Keyboard/Mouse */
+ u16 lpc_config = CNF1_LPC_EN | CNF2_LPC_EN |
+ COMA_LPC_EN | KBC_LPC_EN | MC_LPC_EN;
pci_write_config16(dev, LPC_EN, lpc_config);
}