src: Make HAVE_CF9_RESET set the FADT reset register

All supported x86 chips select HAVE_CF9_RESET, and also use 0xcf9 as
reset register in FADT. How unsurprising. We might as well use that
information to automatically fill in the FADT accordingly. So, do it.

To avoid having x86-specific code under arch-agnostic `acpi/`, create a
new optional `arch_fill_fadt` function, and override it for x86 systems.

Tested on Asus P8Z77-V LX2 with Linux 5.7.6 and Windows 10 at the end of
the patch train, both operating systems are able to boot successfully.

Change-Id: Ib436b04aafd66c3ddfa205b870c1e95afb3e846d
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43389
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-by: Frans Hendriks <fhendriks@eltan.com>

11 files changed, 5 insertions, 116 deletions

diff --git a/src/southbridge/amd/agesa/hudson/fadt.c b/src/southbridge/amd/agesa/hudson/fadt.c
index efd0b41cbc..220b327de0 100644
--- a/src/southbridge/amd/agesa/hudson/fadt.c
+++ b/src/southbridge/amd/agesa/hudson/fadt.c
@@ -64,18 +64,6 @@ void acpi_fill_fadt(acpi_fadt_t *fadt)
 				ACPI_FADT_S4_RTC_VALID |
 				ACPI_FADT_REMOTE_POWER_ON;
 
-	/* Format is from 5.2.3.1: Generic Address Structure */
-	/* reset_reg: see section 4.7.3.6 ACPI 3.0a spec */
-	/* 8 bit write of value 0x06 to 0xCF9 in IO space */
-	fadt->reset_reg.space_id = ACPI_ADDRESS_SPACE_IO;
-	fadt->reset_reg.bit_width = 8;
-	fadt->reset_reg.bit_offset = 0;
-	fadt->reset_reg.access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS;
-	fadt->reset_reg.addrl = 0xcf9;
-	fadt->reset_reg.addrh = 0x0;
-
-	fadt->reset_value = 6;
-
 	fadt->ARM_boot_arch = 0;	/* MUST be 0 ACPI 3.0 */
 	fadt->FADT_MinorVersion = 0;	/* MUST be 0 ACPI 3.0 */
 
diff --git a/src/southbridge/amd/cimx/sb800/fadt.c b/src/southbridge/amd/cimx/sb800/fadt.c
index a163ff7e02..3868d2461c 100644
--- a/src/southbridge/amd/cimx/sb800/fadt.c
+++ b/src/southbridge/amd/cimx/sb800/fadt.c
@@ -84,22 +84,10 @@ void acpi_fill_fadt(acpi_fadt_t *fadt)
 				ACPI_FADT_SLEEP_BUTTON |
 				ACPI_FADT_S4_RTC_WAKE |
 				ACPI_FADT_32BIT_TIMER |
-				ACPI_FADT_RESET_REGISTER |
 				ACPI_FADT_PCI_EXPRESS_WAKE |
 				ACPI_FADT_S4_RTC_VALID |
 				ACPI_FADT_REMOTE_POWER_ON;
 
-	/* Format is from 5.2.3.1: Generic Address Structure */
-	/* reset_reg: see section 4.7.3.6 ACPI 3.0a spec */
-	/* 8 bit write of value 0x06 to 0xCF9 in IO space */
-	fadt->reset_reg.space_id = ACPI_ADDRESS_SPACE_IO;
-	fadt->reset_reg.bit_width = 8;
-	fadt->reset_reg.bit_offset = 0;
-	fadt->reset_reg.access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS;
-	fadt->reset_reg.addrl = 0xcf9;
-	fadt->reset_reg.addrh = 0x0;
-	fadt->reset_value = 6;
-
 	fadt->ARM_boot_arch = 0;	/* MUST be 0 ACPI 3.0 */
 	fadt->FADT_MinorVersion = 0;	/* MUST be 0 ACPI 3.0 */
 
diff --git a/src/southbridge/amd/pi/hudson/fadt.c b/src/southbridge/amd/pi/hudson/fadt.c
index 2d71b0918a..0b73921e7b 100644
--- a/src/southbridge/amd/pi/hudson/fadt.c
+++ b/src/southbridge/amd/pi/hudson/fadt.c
@@ -58,24 +58,11 @@ void acpi_fill_fadt(acpi_fadt_t *fadt)
 				ACPI_FADT_SLEEP_BUTTON |
 				ACPI_FADT_S4_RTC_WAKE |
 				ACPI_FADT_32BIT_TIMER |
-				ACPI_FADT_RESET_REGISTER |
 				ACPI_FADT_PCI_EXPRESS_WAKE |
 				ACPI_FADT_PLATFORM_CLOCK |
 				ACPI_FADT_S4_RTC_VALID |
 				ACPI_FADT_REMOTE_POWER_ON;
 
-	/* Format is from 5.2.3.1: Generic Address Structure */
-	/* reset_reg: see section 4.7.3.6 ACPI 3.0a spec */
-	/* 8 bit write of value 0x06 to 0xCF9 in IO space */
-	fadt->reset_reg.space_id = ACPI_ADDRESS_SPACE_IO;
-	fadt->reset_reg.bit_width = 8;
-	fadt->reset_reg.bit_offset = 0;
-	fadt->reset_reg.access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS;
-	fadt->reset_reg.addrl = 0xcf9;
-	fadt->reset_reg.addrh = 0x0;
-
-	fadt->reset_value = 6;
-
 	fadt->ARM_boot_arch = 0;	/* MUST be 0 ACPI 3.0 */
 	fadt->FADT_MinorVersion = 0;	/* MUST be 0 ACPI 3.0 */
 
diff --git a/src/southbridge/intel/bd82x6x/fadt.c b/src/southbridge/intel/bd82x6x/fadt.c
index c7ba5c25ae..1ef939922e 100644
--- a/src/southbridge/intel/bd82x6x/fadt.c
+++ b/src/southbridge/intel/bd82x6x/fadt.c
@@ -50,7 +50,6 @@ void acpi_fill_fadt(acpi_fadt_t *fadt)
 	fadt->flags |= ACPI_FADT_WBINVD |
 			ACPI_FADT_C1_SUPPORTED |
 			ACPI_FADT_SLEEP_BUTTON |
-			ACPI_FADT_RESET_REGISTER |
 			ACPI_FADT_SEALED_CASE |
 			ACPI_FADT_S4_RTC_WAKE |
 			ACPI_FADT_PLATFORM_CLOCK;
@@ -61,15 +60,6 @@ void acpi_fill_fadt(acpi_fadt_t *fadt)
 		fadt->flags |= ACPI_FADT_C2_MP_SUPPORTED;
 	}
 
-	fadt->reset_reg.space_id = 1;
-	fadt->reset_reg.bit_width = 8;
-	fadt->reset_reg.bit_offset = 0;
-	fadt->reset_reg.access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS;
-	fadt->reset_reg.addrl = 0xcf9;
-	fadt->reset_reg.addrh = 0;
-
-	fadt->reset_value = 6;
-
 	fadt->x_pm1a_evt_blk.space_id = 1;
 	fadt->x_pm1a_evt_blk.bit_width = 32;
 	fadt->x_pm1a_evt_blk.bit_offset = 0;
diff --git a/src/southbridge/intel/i82371eb/fadt.c b/src/southbridge/intel/i82371eb/fadt.c
index 249b22b5bc..05581f43b2 100644
--- a/src/southbridge/intel/i82371eb/fadt.c
+++ b/src/southbridge/intel/i82371eb/fadt.c
@@ -101,15 +101,7 @@ void acpi_fill_fadt(acpi_fadt_t *fadt)
 	 * 18   FORCE_APIC_CLUSTER_MODEL
 	 * 19   FORCE_APIC_PHYSICAL_DESTINATION_MODE
 	 */
-	fadt->flags |= 0xa5 | ACPI_FADT_RESET_REGISTER;
-
-	fadt->reset_reg.space_id = ACPI_ADDRESS_SPACE_IO;
-	fadt->reset_reg.bit_width = 8;
-	fadt->reset_reg.bit_offset = 0;
-	fadt->reset_reg.access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS;
-	fadt->reset_reg.addrl = 0xcf9;
-	fadt->reset_reg.addrh = 0;
-	fadt->reset_value = 0x06;
+	fadt->flags |= 0xa5;
 
 	fadt->x_pm1a_evt_blk.space_id = 1;
 	fadt->x_pm1a_evt_blk.bit_width = fadt->pm1_evt_len * 8;
diff --git a/src/southbridge/intel/i82801dx/fadt.c b/src/southbridge/intel/i82801dx/fadt.c
index b2f7d5fff8..7c3f18a0f9 100644
--- a/src/southbridge/intel/i82801dx/fadt.c
+++ b/src/southbridge/intel/i82801dx/fadt.c
@@ -50,16 +50,7 @@ void acpi_fill_fadt(acpi_fadt_t *fadt)
 
 	fadt->flags |= ACPI_FADT_WBINVD | ACPI_FADT_C1_SUPPORTED |
 			ACPI_FADT_C2_MP_SUPPORTED | ACPI_FADT_SLEEP_BUTTON |
-			ACPI_FADT_S4_RTC_WAKE | ACPI_FADT_RESET_REGISTER |
-			ACPI_FADT_PLATFORM_CLOCK;
-
-	fadt->reset_reg.space_id = ACPI_ADDRESS_SPACE_IO;
-	fadt->reset_reg.bit_width = 8;
-	fadt->reset_reg.bit_offset = 0;
-	fadt->reset_reg.access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS;
-	fadt->reset_reg.addrl = 0xcf9;
-	fadt->reset_reg.addrh = 0;
-	fadt->reset_value = 0x06;
+			ACPI_FADT_S4_RTC_WAKE | ACPI_FADT_PLATFORM_CLOCK;
 
 	fadt->x_pm1a_evt_blk.space_id = 1;
 	fadt->x_pm1a_evt_blk.bit_width = 32;
diff --git a/src/southbridge/intel/i82801gx/fadt.c b/src/southbridge/intel/i82801gx/fadt.c
index 11d4aac79d..602f0fe6a9 100644
--- a/src/southbridge/intel/i82801gx/fadt.c
+++ b/src/southbridge/intel/i82801gx/fadt.c
@@ -49,19 +49,10 @@ void acpi_fill_fadt(acpi_fadt_t *fadt)
 	fadt->iapc_boot_arch = ACPI_FADT_8042 | ACPI_FADT_LEGACY_DEVICES;
 	fadt->flags |= (ACPI_FADT_WBINVD | ACPI_FADT_C1_SUPPORTED
 		       | ACPI_FADT_SLEEP_BUTTON | ACPI_FADT_S4_RTC_WAKE
-		       | ACPI_FADT_PLATFORM_CLOCK | ACPI_FADT_RESET_REGISTER
-		       | ACPI_FADT_C2_MP_SUPPORTED);
+		       | ACPI_FADT_PLATFORM_CLOCK | ACPI_FADT_C2_MP_SUPPORTED);
 	if (chip->docking_supported)
 		fadt->flags |= ACPI_FADT_DOCKING_SUPPORTED;
 
-	fadt->reset_reg.space_id = ACPI_ADDRESS_SPACE_IO;
-	fadt->reset_reg.bit_width = 8;
-	fadt->reset_reg.bit_offset = 0;
-	fadt->reset_reg.access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS;
-	fadt->reset_reg.addrl = 0xcf9;
-	fadt->reset_reg.addrh = 0;
-	fadt->reset_value = 0x06;
-
 	fadt->x_pm1a_evt_blk.space_id = ACPI_ADDRESS_SPACE_IO;
 	fadt->x_pm1a_evt_blk.bit_width = 32;
 	fadt->x_pm1a_evt_blk.bit_offset = 0;
diff --git a/src/southbridge/intel/i82801ix/fadt.c b/src/southbridge/intel/i82801ix/fadt.c
index 8ea69e8058..3e9ee74025 100644
--- a/src/southbridge/intel/i82801ix/fadt.c
+++ b/src/southbridge/intel/i82801ix/fadt.c
@@ -42,16 +42,7 @@ void acpi_fill_fadt(acpi_fadt_t *fadt)
 	fadt->iapc_boot_arch = ACPI_FADT_LEGACY_FREE;
 	fadt->flags |= ACPI_FADT_WBINVD | ACPI_FADT_C1_SUPPORTED |
 			ACPI_FADT_SLEEP_BUTTON | ACPI_FADT_S4_RTC_WAKE |
-			ACPI_FADT_DOCKING_SUPPORTED | ACPI_FADT_RESET_REGISTER |
-			ACPI_FADT_PLATFORM_CLOCK;
-
-	fadt->reset_reg.space_id = ACPI_ADDRESS_SPACE_IO;
-	fadt->reset_reg.bit_width = 8;
-	fadt->reset_reg.bit_offset = 0;
-	fadt->reset_reg.access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS;
-	fadt->reset_reg.addrl = 0xcf9;
-	fadt->reset_reg.addrh = 0;
-	fadt->reset_value = 0x06;
+			ACPI_FADT_DOCKING_SUPPORTED | ACPI_FADT_PLATFORM_CLOCK;
 
 	fadt->x_pm1a_evt_blk.space_id = ACPI_ADDRESS_SPACE_IO;
 	fadt->x_pm1a_evt_blk.bit_width = 32;
diff --git a/src/southbridge/intel/i82801jx/fadt.c b/src/southbridge/intel/i82801jx/fadt.c
index ac2ba76b70..bbb82cc1d4 100644
--- a/src/southbridge/intel/i82801jx/fadt.c
+++ b/src/southbridge/intel/i82801jx/fadt.c
@@ -45,19 +45,10 @@ void acpi_fill_fadt(acpi_fadt_t *fadt)
 	fadt->iapc_boot_arch = ACPI_FADT_8042 | ACPI_FADT_LEGACY_DEVICES;
 	fadt->flags |= (ACPI_FADT_WBINVD | ACPI_FADT_C1_SUPPORTED
 		       | ACPI_FADT_SLEEP_BUTTON | ACPI_FADT_S4_RTC_WAKE
-		       | ACPI_FADT_PLATFORM_CLOCK | ACPI_FADT_RESET_REGISTER
-		       | ACPI_FADT_C2_MP_SUPPORTED);
+		       | ACPI_FADT_PLATFORM_CLOCK | ACPI_FADT_C2_MP_SUPPORTED);
 	if (chip->docking_supported)
 		fadt->flags |= ACPI_FADT_DOCKING_SUPPORTED;
 
-	fadt->reset_reg.space_id = ACPI_ADDRESS_SPACE_IO;
-	fadt->reset_reg.bit_width = 8;
-	fadt->reset_reg.bit_offset = 0;
-	fadt->reset_reg.access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS;
-	fadt->reset_reg.addrl = 0xcf9;
-	fadt->reset_reg.addrh = 0;
-	fadt->reset_value = 0x06;
-
 	fadt->x_pm1a_evt_blk.space_id = ACPI_ADDRESS_SPACE_IO;
 	fadt->x_pm1a_evt_blk.bit_width = 32;
 	fadt->x_pm1a_evt_blk.bit_offset = 0;
diff --git a/src/southbridge/intel/ibexpeak/fadt.c b/src/southbridge/intel/ibexpeak/fadt.c
index 93c95b5692..87adcb34d2 100644
--- a/src/southbridge/intel/ibexpeak/fadt.c
+++ b/src/southbridge/intel/ibexpeak/fadt.c
@@ -50,7 +50,6 @@ void acpi_fill_fadt(acpi_fadt_t *fadt)
 	fadt->flags |= ACPI_FADT_WBINVD |
 			ACPI_FADT_C1_SUPPORTED |
 			ACPI_FADT_SLEEP_BUTTON |
-			ACPI_FADT_RESET_REGISTER |
 			ACPI_FADT_S4_RTC_WAKE |
 			ACPI_FADT_PLATFORM_CLOCK;
 	if (chip->docking_supported) {
@@ -60,15 +59,6 @@ void acpi_fill_fadt(acpi_fadt_t *fadt)
 		fadt->flags |= ACPI_FADT_C2_MP_SUPPORTED;
 	}
 
-	fadt->reset_reg.space_id = 1;
-	fadt->reset_reg.bit_width = 8;
-	fadt->reset_reg.bit_offset = 0;
-	fadt->reset_reg.access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS;
-	fadt->reset_reg.addrl = 0xcf9;
-	fadt->reset_reg.addrh = 0;
-
-	fadt->reset_value = 6;
-
 	fadt->x_pm1a_evt_blk.space_id = 1;
 	fadt->x_pm1a_evt_blk.bit_width = 32;
 	fadt->x_pm1a_evt_blk.bit_offset = 0;
diff --git a/src/southbridge/intel/lynxpoint/fadt.c b/src/southbridge/intel/lynxpoint/fadt.c
index 2868b5f943..9ae6d34d3c 100644
--- a/src/southbridge/intel/lynxpoint/fadt.c
+++ b/src/southbridge/intel/lynxpoint/fadt.c
@@ -57,7 +57,6 @@ void acpi_fill_fadt(acpi_fadt_t *fadt)
 		       ACPI_FADT_C1_SUPPORTED |
 		       ACPI_FADT_C2_MP_SUPPORTED |
 		       ACPI_FADT_SLEEP_BUTTON |
-		       ACPI_FADT_RESET_REGISTER |
 		       ACPI_FADT_SEALED_CASE |
 		       ACPI_FADT_S4_RTC_WAKE |
 		       ACPI_FADT_PLATFORM_CLOCK;
@@ -65,15 +64,6 @@ void acpi_fill_fadt(acpi_fadt_t *fadt)
 	if (cfg->docking_supported)
 		fadt->flags |= ACPI_FADT_DOCKING_SUPPORTED;
 
-	fadt->reset_reg.space_id = ACPI_ADDRESS_SPACE_IO;
-	fadt->reset_reg.bit_width = 8;
-	fadt->reset_reg.bit_offset = 0;
-	fadt->reset_reg.access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS;
-	fadt->reset_reg.addrl = 0xcf9;
-	fadt->reset_reg.addrh = 0;
-
-	fadt->reset_value = 6;
-
 	fadt->x_pm1a_evt_blk.space_id = ACPI_ADDRESS_SPACE_IO;
 	fadt->x_pm1a_evt_blk.bit_width = 2 * 16;
 	fadt->x_pm1a_evt_blk.bit_offset = 0;