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authorRaul E Rangel <rrangel@chromium.org>2020-05-29 17:18:12 -0600
committerFelix Held <felix-coreboot@felixheld.de>2020-07-10 23:32:16 +0000
commit1a31b103c7a86a0cee958116083a896f0ac5e45e (patch)
treeea05a743c6f65b5bfc0cc1f313a2312b87e2a0ad /src/southbridge
parentfc06af867e77d905ba7ad442e70b13c9893d7aa2 (diff)
drivers/usb/pci_xhci: Add a driver to generate xHCI ACPI nodes
We can use xhci_for_each_ext_cap to inspect the xHC so we generate the correct number of device nodes. Scope (\_SB.PCI0.PBRA) { Device (XHC1) { Name (_ADR, 0x0000000000000004) // _ADR: Address Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake { 0x1F, 0x03 }) Device (RHUB) { Name (_ADR, Zero) // _ADR: Address Device (HS01) { Name (_ADR, 0x01) // _ADR: Address } Device (HS02) { Name (_ADR, 0x02) // _ADR: Address } Device (SS01) { Name (_ADR, 0x03) // _ADR: Address } } Name (_S0W, Zero) // _S0W: S0 Device Wake State Name (_S3W, 0x04) // _S3W: S3 Device Wake State Name (_S4W, 0x04) // _S4W: S4 Device Wake State } } BUG=b:154756391 TEST=Boot trembyle and look at ACPI table. See all xHCI nodes. Signed-off-by: Raul E Rangel <rrangel@chromium.org> Change-Id: I44ebaef342e45923bc181ceebef882358d33f0d1 Reviewed-on: https://review.coreboot.org/c/coreboot/+/41900 Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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