diff options
| author | Duncan Laurie <dlaurie@chromium.org> | 2013-11-04 17:02:45 -0800 |
|---|---|---|
| committer | Aaron Durbin <adurbin@google.com> | 2014-04-30 23:11:21 +0200 |
| commit | 1f52f51f4e6dd2c97faa46e3287460d8b2ad335b (patch) | |
| tree | e45fd6e6fe39da8fd3e36bce9f14bf07a2b41c0e /src/southbridge/via | |
| parent | 7fbe20bd2c3b8e0bcb667f5b1a07b80402fa8504 (diff) | |
baytrail: Add function to read top of low memory
The top of low memory is also the start of the region where
PCIe resources are allocated. This needs to be passed in
ACPI but is only readable from IOSF.
BUG=chrome-os-partner:23505
BRANCH=rambi
TEST=build and boot on rambi
Change-Id: Iad95335f72dc3e35b837bedb8d52d388c861a330
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/175625
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/4935
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/southbridge/via')
0 files changed, 0 insertions, 0 deletions