Various cosmetic fixes and improvements (trivial).

 - Use 'static' where appropriate.
 - Use 'const' where appropriate.
 - Indentation fixes.
 - Add comment wrt init code which is only valid for VT8237R.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2974 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

5 files changed, 4 insertions, 9 deletions

diff --git a/src/southbridge/via/vt8237r/vt8237r.c b/src/southbridge/via/vt8237r/vt8237r.c
index 0d257d1f26..f87fc1a398 100644
--- a/src/southbridge/via/vt8237r/vt8237r.c
+++ b/src/southbridge/via/vt8237r/vt8237r.c
@@ -20,7 +20,6 @@
 #include <console/console.h>
 #include <device/device.h>
 #include <device/pci.h>
-#include <device/pci_ops.h>
 #include <device/pci_ids.h>
 #include <pc80/keyboard.h>
 #include "chip.h"
diff --git a/src/southbridge/via/vt8237r/vt8237r_bridge.c b/src/southbridge/via/vt8237r/vt8237r_bridge.c
index 8baaaf8f82..2077f3bb09 100644
--- a/src/southbridge/via/vt8237r/vt8237r_bridge.c
+++ b/src/southbridge/via/vt8237r/vt8237r_bridge.c
@@ -19,7 +19,6 @@
 
 #include <device/device.h>
 #include <device/pci.h>
-#include <device/pci_ops.h>
 #include <device/pci_ids.h>
 #include <console/console.h>
 
diff --git a/src/southbridge/via/vt8237r/vt8237r_ide.c b/src/southbridge/via/vt8237r/vt8237r_ide.c
index 1496f83b33..9f6f3a7a70 100644
--- a/src/southbridge/via/vt8237r/vt8237r_ide.c
+++ b/src/southbridge/via/vt8237r/vt8237r_ide.c
@@ -21,7 +21,6 @@
 
 #include <device/device.h>
 #include <device/pci.h>
-#include <device/pci_ops.h>
 #include <device/pci_ids.h>
 #include <console/console.h>
 #include "vt8237r.h"
diff --git a/src/southbridge/via/vt8237r/vt8237r_lpc.c b/src/southbridge/via/vt8237r/vt8237r_lpc.c
index 5d2579e530..8d0fa3402f 100644
--- a/src/southbridge/via/vt8237r/vt8237r_lpc.c
+++ b/src/southbridge/via/vt8237r/vt8237r_lpc.c
@@ -23,7 +23,6 @@
 #include <console/console.h>
 #include <device/device.h>
 #include <device/pci.h>
-#include <device/pci_ops.h>
 #include <device/pci_ids.h>
 #include <pc80/mc146818rtc.h>
 #include <cpu/x86/lapic.h>
@@ -48,7 +47,7 @@
 
 extern void dump_south(device_t dev);
 
-struct ioapicreg {
+static struct ioapicreg {
 	u32 reg;
 	u32 value_low;
 	u32 value_high;
@@ -146,7 +145,7 @@ static void pci_routing_fixup(struct device *dev)
  * Set up the power management capabilities directly into ACPI mode.
  * This avoids having to handle any System Management Interrupts (SMIs).
  */
-void setup_pm(device_t dev)
+static void setup_pm(device_t dev)
 {
 	/* Debounce LID and PWRBTN# Inputs for 16ms. */
 	pci_write_config8(dev, 0x80, 0x20);
@@ -299,7 +298,7 @@ static void vt8237r_init(struct device *dev)
 	rtc_init(0);
 }
 
-void vt8237r_read_resources(device_t dev)
+static void vt8237r_read_resources(device_t dev)
 {
 	struct resource *res;
 
@@ -320,7 +319,7 @@ void vt8237r_read_resources(device_t dev)
  * than standard PC I/O addresses), however it does control the ISA bus
  * and so we need to manually call enable childrens resources on that bus.
  */
-void vt8237r_enable_resources(device_t dev)
+static void vt8237r_enable_resources(device_t dev)
 {
 	pci_dev_enable_resources(dev);
 	enable_childrens_resources(dev);
diff --git a/src/southbridge/via/vt8237r/vt8237r_sata.c b/src/southbridge/via/vt8237r/vt8237r_sata.c
index 941887f812..1cf2976327 100644
--- a/src/southbridge/via/vt8237r/vt8237r_sata.c
+++ b/src/southbridge/via/vt8237r/vt8237r_sata.c
@@ -20,7 +20,6 @@
 #include <console/console.h>
 #include <device/device.h>
 #include <device/pci.h>
-#include <device/pci_ops.h>
 #include <device/pci_ids.h>
 
 #define SATA_MISC_CTRL 0x45