diff options
| author | Stefan Reinauer <stepan@coresystems.de> | 2010-04-27 06:56:47 +0000 |
|---|---|---|
| committer | Stefan Reinauer <stepan@openbios.org> | 2010-04-27 06:56:47 +0000 |
| commit | 14e22779625de673569c7b950ecc2753fb915b31 (patch) | |
| tree | 14a6ed759e116e9e6e9bbd7f499b74b96d6cc072 /src/southbridge/via/vt8237r | |
| parent | 0e1e8065e303030c39c3f2c27e5d32ee58a16c66 (diff) | |
Since some people disapprove of white space cleanups mixed in regular commits
while others dislike them being extra commits, let's clean them up once and
for all for the existing code. If it's ugly, let it only be ugly once :-)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5507 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/via/vt8237r')
| -rw-r--r-- | src/southbridge/via/vt8237r/vt8237r_early_smbus.c | 8 | ||||
| -rw-r--r-- | src/southbridge/via/vt8237r/vt8237r_lpc.c | 16 |
2 files changed, 12 insertions, 12 deletions
diff --git a/src/southbridge/via/vt8237r/vt8237r_early_smbus.c b/src/southbridge/via/vt8237r/vt8237r_early_smbus.c index aa75f50651..9f824437bf 100644 --- a/src/southbridge/via/vt8237r/vt8237r_early_smbus.c +++ b/src/southbridge/via/vt8237r/vt8237r_early_smbus.c @@ -171,10 +171,10 @@ void enable_smbus(void) } /** - * A fixup for some systems that need time for the SMBus to "warm up". This is - * needed on some VT823x based systems, where the SMBus spurts out bad data for - * a short time after power on. This has been seen on the VIA Epia series and - * Jetway J7F2-series. It reads the ID byte from SMBus, looking for + * A fixup for some systems that need time for the SMBus to "warm up". This is + * needed on some VT823x based systems, where the SMBus spurts out bad data for + * a short time after power on. This has been seen on the VIA Epia series and + * Jetway J7F2-series. It reads the ID byte from SMBus, looking for * known-good data from a slot/address. Exits on either good data or a timeout. * * TODO: This should probably go into some global file, but one would need to diff --git a/src/southbridge/via/vt8237r/vt8237r_lpc.c b/src/southbridge/via/vt8237r/vt8237r_lpc.c index f7acb75766..5a08e3b16f 100644 --- a/src/southbridge/via/vt8237r/vt8237r_lpc.c +++ b/src/southbridge/via/vt8237r/vt8237r_lpc.c @@ -187,7 +187,7 @@ static void setup_pm(device_t dev) * 6 = SUSST# Deasserted Before PWRGD for STD * 5 = Keyboard/Mouse Swap * 4 = PWRGOOD reset on VT8237A/S - * 3 = GPO26/GPO27 is GPO + * 3 = GPO26/GPO27 is GPO * 2 = Disable Alert on Lan * 1 = SUSCLK/GPO4 * 0 = USB Wakeup @@ -247,7 +247,7 @@ static void setup_pm(device_t dev) static void vt8237r_init(struct device *dev) { u8 enables; - + #if CONFIG_EPIA_VT8237R_INIT printk(BIOS_SPEW, "Entering vt8237r_init, for EPIA.\n"); /* @@ -260,9 +260,9 @@ static void vt8237r_init(struct device *dev) enables = pci_read_config8(dev, 0xe5); enables |= 0x23; pci_write_config8(dev, 0xe5, enables); - - /* - * Enable Flash Write Access. + + /* + * Enable Flash Write Access. * Note EPIA-N Does not use REQ5 or PCISTP#(Hang) */ enables = pci_read_config8(dev, 0xe4); @@ -274,14 +274,14 @@ static void vt8237r_init(struct device *dev) enables |= 0x80; pci_write_config8(dev, 0x4E, enables); -#else +#else printk(BIOS_SPEW, "Entering vt8237r_init.\n"); /* * Enable SATA LED, disable special CPU Frequency Change - * GPIO28 GPIO22 GPIO29 GPIO23 are GPIOs. */ pci_write_config8(dev, 0xe5, 0x09); - + /* REQ5 as PCI request input - should be together with INTE-INTH. */ pci_write_config8(dev, 0xe4, 0x4); #endif @@ -329,7 +329,7 @@ static void vt8237s_init(struct device *dev) (VT8237S_SPI_MEM_BASE >> 8) | (tmp & 0xFF000000)); /* - * REQ5 as PCI request input - should be together with INTE-INTH. + * REQ5 as PCI request input - should be together with INTE-INTH. */ pci_write_config8(dev, 0xe4, 0x04); |